blob: 2f08dfed020faa5dfd63b77d87b7395a56b5d699 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stephen Warrenbea26742012-05-16 06:21:00 +00002/*
3 * (C) Copyright 2010-2012
4 * NVIDIA Corporation <www.nvidia.com>
Stephen Warrenbea26742012-05-16 06:21:00 +00005 */
6
Tom Warren29f3e3f2012-09-04 17:00:24 -07007#ifndef __TEGRA_COMMON_POST_H
8#define __TEGRA_COMMON_POST_H
Stephen Warrenbea26742012-05-16 06:21:00 +00009
Svyatoslav Ryhelef35fff2024-06-18 13:07:57 +030010#define BOOT_TARGETS "usb mmc1 mmc0 pxe dhcp"
Stephen Warrenbea26742012-05-16 06:21:00 +000011
Allen Martin7992bfb2012-10-24 08:32:05 +000012#ifdef CONFIG_TEGRA_KEYBOARD
13#define STDIN_KBD_KBC ",tegra-kbc"
14#else
15#define STDIN_KBD_KBC ""
16#endif
17
18#ifdef CONFIG_USB_KEYBOARD
19#define STDIN_KBD_USB ",usbkbd"
Allen Martin7992bfb2012-10-24 08:32:05 +000020#else
21#define STDIN_KBD_USB ""
22#endif
23
Svyatoslav Ryhel12b38872023-06-30 10:29:00 +030024#ifdef CONFIG_BUTTON_KEYBOARD
25#define STDIN_BTN_KBD ",button-kbd"
26#else
27#define STDIN_BTN_KBD ""
28#endif
29
Simon Glassb86986c2022-10-18 07:46:31 -060030#ifdef CONFIG_VIDEO
Simon Glass135a87e2016-01-30 16:37:49 -070031#define STDOUT_VIDEO ",vidconsole"
32#else
33#define STDOUT_VIDEO ""
34#endif
35
Simon Glassbbe0d4d2015-06-05 14:39:32 -060036#ifdef CONFIG_CROS_EC_KEYB
37#define STDOUT_CROS_EC ",cros-ec-keyb"
38#else
39#define STDOUT_CROS_EC ""
40#endif
41
Allen Martin7992bfb2012-10-24 08:32:05 +000042#define TEGRA_DEVICE_SETTINGS \
Svyatoslav Ryhel12b38872023-06-30 10:29:00 +030043 "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC STDIN_BTN_KBD "\0" \
Simon Glassbaefc722022-10-18 06:10:04 -060044 "stdout=serial" STDOUT_VIDEO "\0" \
45 "stderr=serial" STDOUT_VIDEO "\0" \
Stephen Warrenc35eb562013-01-22 06:20:07 +000046 ""
Allen Martin7992bfb2012-10-24 08:32:05 +000047
Stephen Warrenb9b53a62014-01-23 13:17:01 -070048#ifndef BOARD_EXTRA_ENV_SETTINGS
49#define BOARD_EXTRA_ENV_SETTINGS
50#endif
51
Tom Warren7aaa5a62015-03-04 16:36:00 -070052#ifdef CONFIG_ARM64
53#define FDT_HIGH "ffffffffffffffff"
54#define INITRD_HIGH "ffffffffffffffff"
55#else
56#define FDT_HIGH "ffffffff"
57#define INITRD_HIGH "ffffffff"
58#endif
59
Tom Rini0613c362022-12-04 10:03:50 -050060#define CFG_EXTRA_ENV_SETTINGS \
Tom Warren29f3e3f2012-09-04 17:00:24 -070061 TEGRA_DEVICE_SETTINGS \
Stephen Warren938176a2012-10-02 09:26:51 +000062 MEM_LAYOUT_ENV_SETTINGS \
Tom Warren7aaa5a62015-03-04 16:36:00 -070063 "fdt_high=" FDT_HIGH "\0" \
64 "initrd_high=" INITRD_HIGH "\0" \
Svyatoslav Ryhel2bd07c12024-01-06 22:33:59 +020065 "boot_targets=" BOOT_TARGETS "\0" \
Tom Rini6c3c05f2022-03-30 18:07:25 -040066 BOARD_EXTRA_ENV_SETTINGS
Stephen Warrenbea26742012-05-16 06:21:00 +000067
Tom Warren29f3e3f2012-09-04 17:00:24 -070068#endif /* __TEGRA_COMMON_POST_H */