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wdenkbf9e3b32004-02-12 00:47:09 +00001/*
2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
Wolfgang Denk4af099b2006-05-09 13:49:12 +020026#include <watchdog.h>
wdenkbf9e3b32004-02-12 00:47:09 +000027
28#include <asm/mcfuart.h>
29
Zachary P. Landaueacbd312006-01-26 17:35:56 -050030#ifdef CONFIG_M5271
31#include <asm/m5271.h>
32#endif
33
wdenkbf9e3b32004-02-12 00:47:09 +000034#ifdef CONFIG_M5272
35#include <asm/m5272.h>
36#endif
37
38#ifdef CONFIG_M5282
39#include <asm/m5282.h>
40#endif
41
stroese8c725b92004-12-16 18:09:49 +000042#ifdef CONFIG_M5249
43#include <asm/m5249.h>
44#endif
45
Wolfgang Denkd87080b2006-03-31 18:32:53 +020046DECLARE_GLOBAL_DATA_PTR;
47
Marian Balakowicz0c056f02006-05-09 11:37:13 +020048#if defined(CONFIG_M5249) || defined(CONFIG_M5271)
stroese8c725b92004-12-16 18:09:49 +000049#define DoubleClock(a) ((double)(CFG_CLK/2) / 32.0 / (double)(a))
50#else
wdenkbf9e3b32004-02-12 00:47:09 +000051#define DoubleClock(a) ((double)(CFG_CLK) / 32.0 / (double)(a))
stroese8c725b92004-12-16 18:09:49 +000052#endif
wdenkbf9e3b32004-02-12 00:47:09 +000053
54void rs_serial_setbaudrate(int port,int baudrate)
55{
Zachary P. Landaueacbd312006-01-26 17:35:56 -050056#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
wdenkbf9e3b32004-02-12 00:47:09 +000057 volatile unsigned char *uartp;
Wolfgang Denk4176c792006-06-10 19:27:47 +020058# ifndef CONFIG_M5271
Marian Balakowicz0c056f02006-05-09 11:37:13 +020059 double fraction;
Wolfgang Denk4176c792006-06-10 19:27:47 +020060# endif
Marian Balakowicz0c056f02006-05-09 11:37:13 +020061 double clock;
wdenkbf9e3b32004-02-12 00:47:09 +000062
63 if (port == 0)
wdenkbf9e3b32004-02-12 00:47:09 +000064 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
65 else
66 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
67
Wolfgang Denk4176c792006-06-10 19:27:47 +020068 clock = DoubleClock(baudrate); /* Set baud above */
Marian Balakowicz0c056f02006-05-09 11:37:13 +020069
Wolfgang Denk4176c792006-06-10 19:27:47 +020070 uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
71 uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
72
73# ifndef CONFIG_M5271
wdenkbf9e3b32004-02-12 00:47:09 +000074 fraction = ((clock - (int)clock) * 16.0) + 0.5;
Wolfgang Denk4176c792006-06-10 19:27:47 +020075 uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
76# endif
wdenkbf9e3b32004-02-12 00:47:09 +000077#endif
Wolfgang Denk4176c792006-06-10 19:27:47 +020078
Heiko Schocher9acb6262006-04-20 08:42:42 +020079#if defined(CONFIG_M5282)
80 volatile unsigned char *uartp;
81 long clock;
82
Wolfgang Denk4176c792006-06-10 19:27:47 +020083 switch (port) {
84 case 1:
85 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
86 break;
87 case 2:
88 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE3);
89 break;
90 default:
91 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
Heiko Schocher9acb6262006-04-20 08:42:42 +020092 }
93
Wolfgang Denk4176c792006-06-10 19:27:47 +020094 clock = (long) CFG_CLK / ((long) 32 * baudrate); /* Set baud above */
Heiko Schocher9acb6262006-04-20 08:42:42 +020095
Wolfgang Denk4176c792006-06-10 19:27:47 +020096 uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
97 uartp[MCFUART_UBG2] = ((int) clock & 0xff); /* set lsb baud */
Heiko Schocher9acb6262006-04-20 08:42:42 +020098
99#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000100};
101
Wolfgang Denk4176c792006-06-10 19:27:47 +0200102void rs_serial_init (int port, int baudrate)
wdenkbf9e3b32004-02-12 00:47:09 +0000103{
Wolfgang Denk4176c792006-06-10 19:27:47 +0200104 volatile unsigned char *uartp;
wdenkbf9e3b32004-02-12 00:47:09 +0000105
106 /*
Wolfgang Denk4176c792006-06-10 19:27:47 +0200107 * Reset UART, get it into known state...
wdenkbf9e3b32004-02-12 00:47:09 +0000108 */
Wolfgang Denk4176c792006-06-10 19:27:47 +0200109 switch (port) {
110 case 1:
111 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
112 break;
113#if defined(CONFIG_M5282)
114 case 2:
115 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE3);
116 break;
117#endif
118 default:
119 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
Heiko Schocher9acb6262006-04-20 08:42:42 +0200120 }
wdenkbf9e3b32004-02-12 00:47:09 +0000121
Wolfgang Denk4176c792006-06-10 19:27:47 +0200122 uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */
123 uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
124
125 uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */
126 uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR; /* reset Error pointer */
wdenkbf9e3b32004-02-12 00:47:09 +0000127
128 /*
129 * Set port for CONSOLE_BAUD_RATE, 8 data bits, 1 stop bit, no parity.
130 */
131 uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8;
132 uartp[MCFUART_UMR] = MCFUART_MR2_STOP1;
133
Marian Balakowicz0c056f02006-05-09 11:37:13 +0200134 /* Mask UART interrupts */
135 uartp[MCFUART_UIMR] = 0;
136
137 /* Set clock Select Register: Tx/Rx clock is timer */
138 uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER;
Wolfgang Denk977b50f2006-05-10 17:43:20 +0200139
Wolfgang Denk4176c792006-06-10 19:27:47 +0200140 rs_serial_setbaudrate (port, baudrate);
wdenkbf9e3b32004-02-12 00:47:09 +0000141
Marian Balakowicz0c056f02006-05-09 11:37:13 +0200142 /* Enable Tx/Rx */
wdenkbf9e3b32004-02-12 00:47:09 +0000143 uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE;
144
145 return;
146}
147
148/****************************************************************************/
149/*
150 * Output a single character, using UART polled mode.
151 * This is used for console output.
152 */
153
154void rs_put_char(char ch)
155{
156 volatile unsigned char *uartp;
157 int i;
158
159 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
160
161 for (i = 0; (i < 0x10000); i++) {
162 if (uartp[MCFUART_USR] & MCFUART_USR_TXREADY)
163 break;
164 }
165 uartp[MCFUART_UTB] = ch;
166 return;
167}
168
169int rs_is_char(void)
170{
171 volatile unsigned char *uartp;
172
173 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
174 return((uartp[MCFUART_USR] & MCFUART_USR_RXREADY) ? 1 : 0);
175}
176
177int rs_get_char(void)
178{
179 volatile unsigned char *uartp;
180
181 uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
182 return(uartp[MCFUART_URB]);
183}
184
185void serial_setbrg(void) {
wdenkbf9e3b32004-02-12 00:47:09 +0000186 rs_serial_setbaudrate(0,gd->bd->bi_baudrate);
187}
188
189int serial_init(void) {
wdenkbf9e3b32004-02-12 00:47:09 +0000190 rs_serial_init(0,gd->baudrate);
191 return 0;
192}
193
194
195void serial_putc(const char c) {
196 if (c == '\n')
197 serial_putc ('\r');
198 rs_put_char(c);
199}
200
201void serial_puts (const char *s) {
Wolfgang Denk4176c792006-06-10 19:27:47 +0200202 while (*s)
wdenkbf9e3b32004-02-12 00:47:09 +0000203 serial_putc(*s++);
wdenkbf9e3b32004-02-12 00:47:09 +0000204}
205
206int serial_getc(void) {
Wolfgang Denk4af099b2006-05-09 13:49:12 +0200207 while(!rs_is_char())
208 WATCHDOG_RESET();
209
wdenkbf9e3b32004-02-12 00:47:09 +0000210 return rs_get_char();
211}
212
213int serial_tstc() {
214 return rs_is_char();
215}