blob: ab94879c423d687695aa4caf8544df19f53b9c4f [file] [log] [blame]
Patrick Delaunay2514c2d2018-03-12 10:46:10 +01001if ARCH_STM32MP
2
3config SPL
4 select SPL_BOARD_INIT
5 select SPL_CLK
6 select SPL_DM
7 select SPL_DM_SEQ_ALIAS
8 select SPL_FRAMEWORK
9 select SPL_GPIO_SUPPORT
10 select SPL_LIBCOMMON_SUPPORT
11 select SPL_LIBGENERIC_SUPPORT
12 select SPL_OF_CONTROL
13 select SPL_OF_TRANSLATE
14 select SPL_PINCTRL
15 select SPL_REGMAP
16 select SPL_RESET_SUPPORT
17 select SPL_SERIAL_SUPPORT
18 select SPL_SYSCON
19 imply SPL_LIBDISK_SUPPORT
20
21config SYS_SOC
22 default "stm32mp"
23
24config TARGET_STM32MP1
25 bool "Support stm32mp1xx"
26 select CPU_V7
27 select PINCTRL_STM32
28 select STM32_RESET
29 help
30 target STMicroelectronics SOC STM32MP1 family
31 STMicroelectronics MPU with core ARMv7
32
33config SYS_TEXT_BASE
34 prompt "U-Boot base address"
35 default 0xC0100000
36 help
37 configure the U-Boot base address
38 when DDR driver is used:
39 DDR + 1MB (0xC0100000)
40
41endif