blob: 1bf3f4a4aa79ded898cddcf0cb1755ad41f188dd [file] [log] [blame]
Marcel Ziswiler25ab9792022-07-21 15:27:35 +02001// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
Igor Opaniuka5de86c2020-07-15 13:31:02 +03002/*
Marcel Ziswiler25ab9792022-07-21 15:27:35 +02003 * Copyright 2020-2022 Toradex
Igor Opaniuka5de86c2020-07-15 13:31:02 +03004 */
5
Marcel Ziswiler25ab9792022-07-21 15:27:35 +02006&{/aliases} {
7 /* SDHCI instance order: eMMC, SD/MMC */
8 mmc0 = &usdhc3;
9 mmc1 = &usdhc1;
10};
11
Igor Opaniuka5de86c2020-07-15 13:31:02 +030012&lcdif {
13 status = "okay";
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_lcdif_dat
16 &pinctrl_lcdif_ctrl>;
17 display = <&display0>;
18 u-boot,dm-pre-reloc;
19
20 display0: display0 {
21 bits-per-pixel = <18>;
22 bus-width = <18>;
23 status = "okay";
24
25 display-timings {
26 native-mode = <&timing_vga>;
27 timing_vga: 640x480 {
28 clock-frequency = <25175000>;
29 hactive = <640>;
30 vactive = <480>;
31 hback-porch = <40>;
32 hfront-porch = <24>;
33 vback-porch = <32>;
34 vfront-porch = <11>;
35 hsync-len = <96>;
36 vsync-len = <2>;
37
38 de-active = <1>;
39 hsync-active = <0>;
40 vsync-active = <0>;
41 pixelclk-active = <0>;
42 };
43 };
44 };
45};