blob: 2baca48109f9155cd08369de9b4bc5da6a8dbc6f [file] [log] [blame]
Liviu Dudau0fabfeb2018-09-28 13:43:31 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Arm Ltd
4 * Author: Liviu Dudau <liviu.dudau@foss.arm.com>
5 *
6 */
7#include <common.h>
8#include <dm.h>
Simon Glass336d4612020-02-03 07:36:16 -07009#include <malloc.h>
Liviu Dudau0fabfeb2018-09-28 13:43:31 +010010#include <dm/read.h>
11#include <asm/io.h>
Simon Glasscd93d622020-05-10 11:40:13 -060012#include <linux/bitops.h>
Liviu Dudau0fabfeb2018-09-28 13:43:31 +010013#include <linux/delay.h>
14#include <misc.h>
15
16#define SYS_CFGDATA 0xa0
17
18#define SYS_CFGCTRL 0xa4
19#define SYS_CFGCTRL_START BIT(31)
20#define SYS_CFGCTRL_WRITE BIT(30)
21
22#define SYS_CFGSTAT 0xa8
23#define SYS_CFGSTAT_ERR BIT(1)
24#define SYS_CFGSTAT_COMPLETE BIT(0)
25
26struct vexpress_config_sysreg {
27 phys_addr_t addr;
28 u32 site;
29};
30
31static int vexpress_config_exec(struct vexpress_config_sysreg *syscfg,
32 bool write, void *buf, int size)
33{
34 u32 cmd, status, tries = 100;
35
36 cmd = (*(u32 *)buf) | SYS_CFGCTRL_START | (syscfg->site << 16);
37
38 if (!write) {
39 /* write a canary in the data register for reads */
40 writel(0xdeadbeef, syscfg->addr + SYS_CFGDATA);
41 } else {
42 cmd |= SYS_CFGCTRL_WRITE;
43 writel(((u32 *)buf)[1], syscfg->addr + SYS_CFGDATA);
44 }
45 writel(0, syscfg->addr + SYS_CFGSTAT);
46 writel(cmd, syscfg->addr + SYS_CFGCTRL);
47
48 /* completion of command takes ages, go to sleep (150us) */
49 do {
50 udelay(150);
51 status = readl(syscfg->addr + SYS_CFGSTAT);
52 if (status & SYS_CFGSTAT_ERR)
53 return -EFAULT;
54 } while (--tries && !(status & SYS_CFGSTAT_COMPLETE));
55
56 if (!tries)
57 return -ETIMEDOUT;
58
59 if (!write)
60 (*(u32 *)buf) = readl(syscfg->addr + SYS_CFGDATA);
61
62 return 0;
63}
64
65static int vexpress_config_read(struct udevice *dev,
66 int offset, void *buf, int size)
67{
68 struct vexpress_config_sysreg *priv = dev_get_uclass_priv(dev);
69
70 if (size != sizeof(u32))
71 return -EINVAL;
72
73 return vexpress_config_exec(priv, false, buf, size);
74}
75
76static int vexpress_config_write(struct udevice *dev,
77 int offset, const void *buf, int size)
78{
79 struct vexpress_config_sysreg *priv = dev_get_uclass_priv(dev);
80
81 if (size != sizeof(u32) * 2)
82 return -EINVAL;
83
84 return vexpress_config_exec(priv, true, (void *)buf, size);
85}
86
87static struct misc_ops vexpress_config_ops = {
88 .read = vexpress_config_read,
89 .write = vexpress_config_write,
90};
91
92static int vexpress_config_probe(struct udevice *dev)
93{
94 struct ofnode_phandle_args args;
95 struct vexpress_config_sysreg *priv;
96 const char *prop;
97 int err, prop_size;
98
99 err = dev_read_phandle_with_args(dev, "arm,vexpress,config-bridge",
100 NULL, 0, 0, &args);
101 if (err)
102 return err;
103
104 prop = ofnode_get_property(args.node, "compatible", &prop_size);
105 if (!prop || (strncmp(prop, "arm,vexpress-sysreg", 19) != 0))
106 return -ENOENT;
107
108 priv = calloc(1, sizeof(*priv));
109 if (!priv)
110 return -ENOMEM;
111
Simon Glass0fd3d912020-12-22 19:30:28 -0700112 dev_get_uclass_priv(dev) = priv;
Liviu Dudau0fabfeb2018-09-28 13:43:31 +0100113 priv->addr = ofnode_get_addr(args.node);
114
115 return dev_read_u32(dev, "arm,vexpress,site", &priv->site);
116}
117
118static const struct udevice_id vexpress_config_ids[] = {
119 { .compatible = "arm,vexpress,config-bus" },
120 { }
121};
122
123U_BOOT_DRIVER(vexpress_config_drv) = {
124 .name = "vexpress_config_bus",
125 .id = UCLASS_MISC,
126 .of_match = vexpress_config_ids,
127 .bind = dm_scan_fdt_dev,
128 .probe = vexpress_config_probe,
129 .ops = &vexpress_config_ops,
130};