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Jagan Teki29dac632020-06-10 16:06:57 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
4 * Copyright (c) 2019 Radxa Limited
5 * Copyright (c) 2019 Amarula Solutions(India)
6 */
7
8#include <dt-bindings/pwm/pwm.h>
9
10/ {
Jagan Teki27107792020-07-21 20:54:35 +053011 clkin_gmac: external-gmac-clock {
12 compatible = "fixed-clock";
13 clock-frequency = <125000000>;
14 clock-output-names = "clkin_gmac";
15 #clock-cells = <0>;
16 };
17
18 vcc12v_dcin: vcc12v-dcin-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vcc12v_dcin";
21 regulator-always-on;
22 regulator-boot-on;
23 regulator-min-microvolt = <12000000>;
24 regulator-max-microvolt = <12000000>;
25 };
26
27 vcc5v0_sys: vcc5v0-sys-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vcc5v0_sys";
30 regulator-always-on;
31 regulator-boot-on;
32 regulator-min-microvolt = <5000000>;
33 regulator-max-microvolt = <5000000>;
34 vin-supply = <&vcc12v_dcin>;
Jagan Teki29dac632020-06-10 16:06:57 +053035 };
36};
37
38&gmac {
Jagan Teki27107792020-07-21 20:54:35 +053039 assigned-clock-parents = <&clkin_gmac>;
40 clock_in_out = "input";
41 phy-mode = "rgmii";
42 pinctrl-names = "default";
43 pinctrl-0 = <&rgmii_pins>;
44 snps,reset-active-low;
45 snps,reset-delays-us = <0 10000 50000>;
46 tx_delay = <0x28>;
47 rx_delay = <0x11>;
Jagan Teki29dac632020-06-10 16:06:57 +053048 status = "okay";
49};
50
Jagan Teki29dac632020-06-10 16:06:57 +053051&pwm0 {
52 status = "okay";
53};
54
55&pwm2 {
56 status = "okay";
57};
58
59&sdmmc {
60 bus-width = <4>;
61 cap-mmc-highspeed;
62 cap-sd-highspeed;
Jagan Teki29dac632020-06-10 16:06:57 +053063 disable-wp;
64 vqmmc-supply = <&vccio_sd>;
Jagan Teki29dac632020-06-10 16:06:57 +053065 pinctrl-names = "default";
66 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
67 status = "okay";
68};
69
70&uart0 {
71 pinctrl-names = "default";
72 pinctrl-0 = <&uart0_xfer &uart0_cts>;
73 status = "okay";
74};
75
76&uart2 {
77 status = "okay";
78};