blob: 80d97b4bba3fa266d96a042c74ecd310e3a7e6c3 [file] [log] [blame]
TsiChung Liew7b7a8692008-08-06 16:08:41 -05001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * Copyright 2008, Network Appliance Inc.
6 * Jason McMullan <mcmullan@netapp.com>
7 *
8 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
9 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#include <common.h>
31#include <malloc.h>
32#include <spi_flash.h>
33
34#include "spi_flash_internal.h"
35
36/* M25Pxx-specific commands */
37#define CMD_M25PXX_WREN 0x06 /* Write Enable */
38#define CMD_M25PXX_WRDI 0x04 /* Write Disable */
39#define CMD_M25PXX_RDSR 0x05 /* Read Status Register */
40#define CMD_M25PXX_WRSR 0x01 /* Write Status Register */
41#define CMD_M25PXX_READ 0x03 /* Read Data Bytes */
42#define CMD_M25PXX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
43#define CMD_M25PXX_PP 0x02 /* Page Program */
44#define CMD_M25PXX_SE 0xd8 /* Sector Erase */
45#define CMD_M25PXX_BE 0xc7 /* Bulk Erase */
46#define CMD_M25PXX_DP 0xb9 /* Deep Power-down */
47#define CMD_M25PXX_RES 0xab /* Release from DP, and Read Signature */
48
Thomas Chou12c2e3b2010-04-30 21:11:20 +080049#define STM_ID_M25P10 0x11
TsiChung Liew7b7a8692008-08-06 16:08:41 -050050#define STM_ID_M25P16 0x15
51#define STM_ID_M25P20 0x12
52#define STM_ID_M25P32 0x16
53#define STM_ID_M25P40 0x13
54#define STM_ID_M25P64 0x17
55#define STM_ID_M25P80 0x14
56#define STM_ID_M25P128 0x18
57
TsiChung Liew7b7a8692008-08-06 16:08:41 -050058struct stmicro_spi_flash_params {
59 u8 idcode1;
60 u16 page_size;
61 u16 pages_per_sector;
62 u16 nr_sectors;
63 const char *name;
64};
65
Brad Bozarth68f87182009-01-01 22:45:47 -050066/* spi_flash needs to be first so upper layers can free() it */
TsiChung Liew7b7a8692008-08-06 16:08:41 -050067struct stmicro_spi_flash {
TsiChung Liew7b7a8692008-08-06 16:08:41 -050068 struct spi_flash flash;
Brad Bozarth68f87182009-01-01 22:45:47 -050069 const struct stmicro_spi_flash_params *params;
TsiChung Liew7b7a8692008-08-06 16:08:41 -050070};
71
72static inline struct stmicro_spi_flash *to_stmicro_spi_flash(struct spi_flash
73 *flash)
74{
75 return container_of(flash, struct stmicro_spi_flash, flash);
76}
77
78static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = {
79 {
Thomas Chou12c2e3b2010-04-30 21:11:20 +080080 .idcode1 = STM_ID_M25P10,
81 .page_size = 256,
82 .pages_per_sector = 128,
83 .nr_sectors = 4,
84 .name = "M25P10",
85 },
86 {
TsiChung Liew7b7a8692008-08-06 16:08:41 -050087 .idcode1 = STM_ID_M25P16,
88 .page_size = 256,
89 .pages_per_sector = 256,
90 .nr_sectors = 32,
91 .name = "M25P16",
92 },
93 {
94 .idcode1 = STM_ID_M25P20,
95 .page_size = 256,
96 .pages_per_sector = 256,
97 .nr_sectors = 4,
98 .name = "M25P20",
99 },
100 {
101 .idcode1 = STM_ID_M25P32,
102 .page_size = 256,
103 .pages_per_sector = 256,
104 .nr_sectors = 64,
105 .name = "M25P32",
106 },
107 {
108 .idcode1 = STM_ID_M25P40,
109 .page_size = 256,
110 .pages_per_sector = 256,
111 .nr_sectors = 8,
112 .name = "M25P40",
113 },
114 {
115 .idcode1 = STM_ID_M25P64,
116 .page_size = 256,
117 .pages_per_sector = 256,
118 .nr_sectors = 128,
119 .name = "M25P64",
120 },
121 {
122 .idcode1 = STM_ID_M25P80,
123 .page_size = 256,
124 .pages_per_sector = 256,
125 .nr_sectors = 16,
126 .name = "M25P80",
127 },
128 {
129 .idcode1 = STM_ID_M25P128,
130 .page_size = 256,
131 .pages_per_sector = 1024,
132 .nr_sectors = 64,
133 .name = "M25P128",
134 },
135};
136
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500137static int stmicro_write(struct spi_flash *flash,
138 u32 offset, size_t len, const void *buf)
139{
140 struct stmicro_spi_flash *stm = to_stmicro_spi_flash(flash);
141 unsigned long page_addr;
142 unsigned long byte_addr;
143 unsigned long page_size;
144 size_t chunk_len;
145 size_t actual;
146 int ret;
147 u8 cmd[4];
148
149 page_size = stm->params->page_size;
150 page_addr = offset / page_size;
151 byte_addr = offset % page_size;
152
153 ret = spi_claim_bus(flash->spi);
154 if (ret) {
155 debug("SF: Unable to claim SPI bus\n");
156 return ret;
157 }
158
159 ret = 0;
160 for (actual = 0; actual < len; actual += chunk_len) {
161 chunk_len = min(len - actual, page_size - byte_addr);
162
163 cmd[0] = CMD_M25PXX_PP;
164 cmd[1] = page_addr >> 8;
165 cmd[2] = page_addr;
166 cmd[3] = byte_addr;
167
168 debug
169 ("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n",
170 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
171
Mike Frysinger2744a4e2011-04-23 23:05:55 +0000172 ret = spi_flash_cmd_write_enable(flash);
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500173 if (ret < 0) {
174 debug("SF: Enabling Write failed\n");
175 break;
176 }
177
178 ret = spi_flash_cmd_write(flash->spi, cmd, 4,
179 buf + actual, chunk_len);
180 if (ret < 0) {
181 debug("SF: STMicro Page Program failed\n");
182 break;
183 }
184
Mike Frysinger61630452011-01-10 02:20:12 -0500185 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
186 if (ret)
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500187 break;
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500188
189 page_addr++;
190 byte_addr = 0;
191 }
192
193 debug("SF: STMicro: Successfully programmed %u bytes @ 0x%x\n",
194 len, offset);
195
196 spi_release_bus(flash->spi);
197 return ret;
198}
199
Mike Frysingerf8f07572011-04-12 01:51:29 -0400200static int stmicro_erase(struct spi_flash *flash, u32 offset, size_t len)
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500201{
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500202 return spi_flash_cmd_erase(flash, CMD_M25PXX_SE, offset, len);
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500203}
204
205struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode)
206{
207 const struct stmicro_spi_flash_params *params;
208 struct stmicro_spi_flash *stm;
209 unsigned int i;
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500210
Thomas Chou12c2e3b2010-04-30 21:11:20 +0800211 if (idcode[0] == 0xff) {
212 i = spi_flash_cmd(spi, CMD_M25PXX_RES,
213 idcode, 4);
214 if (i)
215 return NULL;
216 if ((idcode[3] & 0xf0) == 0x10) {
217 idcode[0] = 0x20;
218 idcode[1] = 0x20;
219 idcode[2] = idcode[3] + 1;
220 } else
221 return NULL;
222 }
223
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500224 for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) {
225 params = &stmicro_spi_flash_table[i];
226 if (params->idcode1 == idcode[2]) {
227 break;
228 }
229 }
230
231 if (i == ARRAY_SIZE(stmicro_spi_flash_table)) {
Mike Frysinger9726ba42009-03-27 16:34:21 -0400232 debug("SF: Unsupported STMicro ID %02x\n", idcode[1]);
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500233 return NULL;
234 }
235
236 stm = malloc(sizeof(struct stmicro_spi_flash));
237 if (!stm) {
238 debug("SF: Failed to allocate memory\n");
239 return NULL;
240 }
241
242 stm->params = params;
243 stm->flash.spi = spi;
244 stm->flash.name = params->name;
245
246 stm->flash.write = stmicro_write;
247 stm->flash.erase = stmicro_erase;
Mike Frysingera4c3b402011-01-10 02:20:14 -0500248 stm->flash.read = spi_flash_cmd_read_fast;
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500249 stm->flash.sector_size = params->page_size * params->pages_per_sector;
250 stm->flash.size = stm->flash.sector_size * params->nr_sectors;
TsiChung Liew7b7a8692008-08-06 16:08:41 -0500251
252 return &stm->flash;
253}