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Sergei Poselenov9531a232010-09-09 23:03:31 +02001/*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2010
6 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Sergei Poselenov9531a232010-09-09 23:03:31 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090019#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Sergei Poselenov9531a232010-09-09 23:03:31 +020020#define CONFIG_A4M072 1 /* ... on A4M072 board */
21#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
Stefan Roese746a36a2014-11-19 09:37:46 +010022#define CONFIG_DISPLAY_BOARDINFO
23#define CONFIG_SYS_GENERIC_BOARD
Sergei Poselenov9531a232010-09-09 23:03:31 +020024
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +020025#define CONFIG_SYS_TEXT_BASE 0xFE000000
26
Sergei Poselenov9531a232010-09-09 23:03:31 +020027#define CONFIG_MISC_INIT_R
28
29#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
30
Sergei Poselenov9531a232010-09-09 23:03:31 +020031#define CONFIG_HIGH_BATS 1 /* High BATs supported */
32
33/*
34 * Serial console configuration
35 */
36#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
37#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
38#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
39/* define to enable silent console */
40#define CONFIG_SILENT_CONSOLE
41#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
42
43/*
44 * PCI Mapping:
45 * 0x40000000 - 0x4fffffff - PCI Memory
46 * 0x50000000 - 0x50ffffff - PCI IO Space
47 */
48#define CONFIG_PCI
49
50#if defined(CONFIG_PCI)
51#define CONFIG_PCI_PNP 1
52#define CONFIG_PCI_SCAN_SHOW 1
53#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
54
55#define CONFIG_PCI_MEM_BUS 0x40000000
56#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
57#define CONFIG_PCI_MEM_SIZE 0x10000000
58
59#define CONFIG_PCI_IO_BUS 0x50000000
60#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
61#define CONFIG_PCI_IO_SIZE 0x01000000
62#endif
63
64#define CONFIG_SYS_XLB_PIPELINING 1
65
Wolfgang Denk071bc922010-10-27 22:48:30 +020066#undef CONFIG_EEPRO100
Sergei Poselenov9531a232010-09-09 23:03:31 +020067
68/* Partitions */
69#define CONFIG_MAC_PARTITION
70#define CONFIG_DOS_PARTITION
71
72/* USB */
73#define CONFIG_USB_OHCI_NEW
74#define CONFIG_USB_STORAGE
75#define CONFIG_SYS_OHCI_BE_CONTROLLER
76#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
77#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
78#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
79#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
80#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
81
82#define CONFIG_TIMESTAMP /* Print image info with timestamp */
83
84/*
85 * BOOTP options
86 */
87#define CONFIG_BOOTP_BOOTFILESIZE
88#define CONFIG_BOOTP_BOOTPATH
89#define CONFIG_BOOTP_GATEWAY
90#define CONFIG_BOOTP_HOSTNAME
91
92
93/*
94 * Command line configuration.
95 */
Sergei Poselenov9531a232010-09-09 23:03:31 +020096#define CONFIG_CMD_EEPROM
97#define CONFIG_CMD_FAT
98#define CONFIG_CMD_I2C
99#define CONFIG_CMD_IDE
Sergei Poselenov9531a232010-09-09 23:03:31 +0200100#define CONFIG_CMD_SNTP
101#define CONFIG_CMD_USB
102#define CONFIG_CMD_MII
103#define CONFIG_CMD_DHCP
104#define CONFIG_CMD_PING
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200105#define CONFIG_CMD_DISPLAY
Sergei Poselenov9531a232010-09-09 23:03:31 +0200106
107#if defined(CONFIG_PCI)
108#define CONFIG_CMD_PCI
109#endif
110
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200111#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200112#define CONFIG_SYS_LOWBOOT 1
113#define CONFIG_SYS_LOWBOOT32 1
114#endif
115
116/*
117 * Autobooting
118 */
119#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
120
121#define CONFIG_SYS_AUTOLOAD "n"
122
Sergei Poselenov9531a232010-09-09 23:03:31 +0200123#undef CONFIG_BOOTARGS
124#define CONFIG_PREBOOT "run try_update"
125
126#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Yanok7ae54992010-10-21 17:20:09 +0200127 "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \
128 "cf1=diskboot 200000 0:1\0" \
129 "bootcmd_cf1=run bcf1\0" \
130 "bcf=setenv bootargs root=/dev/hda3\0" \
131 "bootcmd_nfs=run bnfs\0" \
132 "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs "\
133 "panic=1\0" \
134 "bootcmd_nor=cp.b ${kernel_addr} 200000 100000;" \
135 "run norargs addip; run bk\0" \
136 "bnfs=nfs 200000 ${rootpath}/boot/uImage;" \
137 "run nfsargs addip ; run bk\0" \
138 "nfsargs=setenv bootargs root=/dev/nfs rw " \
139 "nfsroot=${serverip}:${rootpath}\0" \
140 "try_update=usb start;sleep 2;usb start;sleep 1;" \
141 "fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;" \
142 "source 2F0000\0" \
143 "env_addr=FE060000\0" \
144 "kernel_addr=FE100000\0" \
145 "rootfs_addr=FE200000\0" \
146 "add_mtd=setenv bootargs ${bootargs} mtdparts=" \
147 "phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \
148 "bcf1=run cf1; run bcf; run addip; run bk\0" \
149 "add_consolespec=setenv bootargs ${bootargs} " \
150 "console=/dev/null quiet\0" \
151 "addip=if test -n ${ethaddr};" \
152 "then if test -n ${ipaddr};" \
153 "then setenv bootargs ${bootargs} " \
154 "ip=${ipaddr}:${serverip}:${gatewayip}:"\
155 "${netmask}:${hostname}:${netdev}:off;" \
156 "fi;" \
157 "else;" \
158 "setenv bootargs ${bootargs} no_ethaddr;" \
159 "fi\0" \
160 "hostname=CPUP0\0" \
Ilya Yanok7ae54992010-10-21 17:20:09 +0200161 "netdev=eth0\0" \
162 "bootcmd=run bootcmd_nor\0" \
Sergei Poselenov9531a232010-09-09 23:03:31 +0200163 ""
164/*
165 * IPB Bus clocking configuration.
166 */
167#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
168
169/*
170 * I2C configuration
171 */
172#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
173#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
174
175#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
176#define CONFIG_SYS_I2C_SLAVE 0x7F
177
178/*
179 * EEPROM configuration
180 */
181#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
182#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
183#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
184#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
185#define CONFIG_SYS_EEPROM_WREN 1
186#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
187
188/*
189 * Flash configuration
190 */
191#define CONFIG_SYS_FLASH_BASE 0xFE000000
192#define CONFIG_SYS_FLASH_SIZE 0x02000000
193#if !defined(CONFIG_SYS_LOWBOOT)
194#error "CONFIG_SYS_LOWBOOT not defined?"
195#else /* CONFIG_SYS_LOWBOOT */
196#if defined(CONFIG_SYS_LOWBOOT32)
197#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
198#endif
199#endif /* CONFIG_SYS_LOWBOOT */
200
201#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
202#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
203#define CONFIG_FLASH_CFI_DRIVER
204#define CONFIG_SYS_FLASH_CFI
205#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
206#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START}
Ilya Yanoke36aff62010-10-21 17:20:13 +0200207#define CONFIG_SYS_FLASH_BANKS_SIZES {CONFIG_SYS_CS0_SIZE}
Sergei Poselenov9531a232010-09-09 23:03:31 +0200208
209/*
210 * Environment settings
211 */
212#define CONFIG_ENV_IS_IN_FLASH 1
213#define CONFIG_ENV_SIZE 0x10000
214#define CONFIG_ENV_SECT_SIZE 0x20000
215#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
216#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
217
218#define CONFIG_ENV_OVERWRITE 1
219
220/*
221 * Memory map
222 */
223#define CONFIG_SYS_MBAR 0xF0000000
224#define CONFIG_SYS_SDRAM_BASE 0x00000000
225#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
226
227/* Use SRAM until RAM will be available */
228#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200229#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200230
231
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200232#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Sergei Poselenov9531a232010-09-09 23:03:31 +0200233#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
234
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200235#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Sergei Poselenov9531a232010-09-09 23:03:31 +0200236#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
237# define CONFIG_SYS_RAMBOOT 1
238#endif
239
240#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
241#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
242#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
243
244/*
245 * Ethernet configuration
246 */
247#define CONFIG_MPC5xxx_FEC 1
248#define CONFIG_MPC5xxx_FEC_MII100
249/*
250 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
251 */
252/* #define CONFIG_MPC5xxx_FEC_MII10 */
253#define CONFIG_PHY_ADDR 0x1f
254#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */
255
256/*
257 * GPIO configuration
258 */
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200259#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004
Sergei Poselenov9531a232010-09-09 23:03:31 +0200260
261/*
262 * Miscellaneous configurable options
263 */
264#define CONFIG_SYS_HUSH_PARSER
265#define CONFIG_CMDLINE_EDITING 1
Sergei Poselenov9531a232010-09-09 23:03:31 +0200266#define CONFIG_SYS_LONGHELP /* undef to save memory */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200267#if defined(CONFIG_CMD_KGDB)
268#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
269#else
270#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
271#endif
272#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
273#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
274#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
275
276#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
277#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
278
279#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
280
Sergei Poselenov9531a232010-09-09 23:03:31 +0200281#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
282#if defined(CONFIG_CMD_KGDB)
283# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
284#endif
285
286
287/*
288 * Various low-level settings
289 */
290#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
291#define CONFIG_SYS_HID0_FINAL HID0_ICE
292/* Flash at CSBoot, CS0 */
293#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
294#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
295#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00
296#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
297#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
298/* External SRAM at CS1 */
299#define CONFIG_SYS_CS1_START 0x62000000
300#define CONFIG_SYS_CS1_SIZE 0x00400000
301#define CONFIG_SYS_CS1_CFG 0x00009930
302#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START
303#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200304/* LED display at CS7 */
305#define CONFIG_SYS_CS7_START 0x6a000000
306#define CONFIG_SYS_CS7_SIZE (64*1024)
307#define CONFIG_SYS_CS7_CFG 0x0000bf30
Sergei Poselenov9531a232010-09-09 23:03:31 +0200308
309#define CONFIG_SYS_CS_BURST 0x00000000
310#define CONFIG_SYS_CS_DEADCYCLE 0x33333003
311
312#define CONFIG_SYS_RESET_ADDRESS 0xff000000
313
314/*-----------------------------------------------------------------------
315 * USB stuff
316 *-----------------------------------------------------------------------
317 */
318#define CONFIG_USB_CLOCK 0x0001BBBB
319#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */
320
321/*-----------------------------------------------------------------------
322 * IDE/ATA stuff Supports IDE harddisk
323 *-----------------------------------------------------------------------
324 */
325
326#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
327
328#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
329#undef CONFIG_IDE_LED /* LED for ide not supported */
330
331#define CONFIG_IDE_PREINIT
332
333#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
334#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
335
336#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
337
338#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
339
340/* Offset for data I/O */
341#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
342
343/* Offset for normal register accesses */
344#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
345
346/* Offset for alternate registers */
347#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
348
349/* Interval between registers */
350#define CONFIG_SYS_ATA_STRIDE 4
351
352#define CONFIG_ATAPI 1
353
354/*-----------------------------------------------------------------------
355 * Open firmware flat tree support
356 *-----------------------------------------------------------------------
357 */
358#define CONFIG_OF_LIBFDT 1
359#define CONFIG_OF_BOARD_SETUP 1
360
361#define OF_CPU "PowerPC,5200@0"
362#define OF_SOC "soc5200@f0000000"
363#define OF_TBCLK (bd->bi_busfreq / 4)
364#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
365
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200366/* Support for the 7-segment display */
367#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START
368#define CONFIG_SHOW_ACTIVITY /* used for display realization */
369
Ilya Yanok92d1a402010-09-09 23:03:34 +0200370#define CONFIG_SHOW_BOOT_PROGRESS
371
Sergei Poselenov9531a232010-09-09 23:03:31 +0200372#endif /* __CONFIG_H */