Heiko Schocher | 4074296 | 2011-02-22 09:08:28 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2006 Freescale Semiconductor, Inc. |
| 3 | * Dave Liu <daveliu@freescale.com> |
| 4 | * |
| 5 | * Copyright (C) 2007 Logic Product Development, Inc. |
| 6 | * Peter Barada <peterb@logicpd.com> |
| 7 | * |
| 8 | * Copyright (C) 2007 MontaVista Software, Inc. |
| 9 | * Anton Vorontsov <avorontsov@ru.mvista.com> |
| 10 | * |
| 11 | * (C) Copyright 2008 |
| 12 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
| 13 | * |
| 14 | * (C) Copyright 2010 |
| 15 | * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com |
| 16 | * |
| 17 | * (C) Copyright 2010-2011 |
| 18 | * Thomas Reufer, KEYMILE Ltd, thomas.reufer@keymile.com |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or |
| 21 | * modify it under the terms of the GNU General Public License as |
| 22 | * published by the Free Software Foundation; either version 2 of |
| 23 | * the License, or (at your option) any later version. |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | /* |
| 30 | * High Level Configuration Options |
| 31 | */ |
| 32 | #define CONFIG_KMSUPX5 1 /* Keymile PBEC8321 board specific */ |
| 33 | #define CONFIG_HOSTNAME supx5 |
| 34 | #define CONFIG_KM_BOARD_NAME "supx5" |
| 35 | |
| 36 | #define CONFIG_SYS_TEXT_BASE 0xF0000000 |
| 37 | |
| 38 | /* include common defines/options for all 8321 Keymile boards */ |
Valentin Longchamp | 264eaa0 | 2011-05-04 01:47:33 +0000 | [diff] [blame] | 39 | #include "km/km8321-common.h" |
Heiko Schocher | 4074296 | 2011-02-22 09:08:28 +0100 | [diff] [blame] | 40 | |
| 41 | /* |
| 42 | * Init Local Bus Memory Controller: |
| 43 | * |
| 44 | * Bank Bus Machine PortSz Size Device |
| 45 | * ---- --- ------- ------ ----- ------ |
| 46 | * 2 Local GPCM 8 bit 256MB LPXF |
| 47 | * 3 Local not used |
| 48 | * |
| 49 | */ |
| 50 | |
| 51 | /* |
| 52 | * LPXF on the local bus CS2 |
| 53 | * Window base at flash base |
| 54 | * Window size: 256 MB |
| 55 | */ |
| 56 | |
| 57 | #define CONFIG_SYS_LPXF_BASE 0xA0000000 /* LPXF */ |
| 58 | #define CONFIG_SYS_LPXF_SIZE 256 /* Megabytes */ |
| 59 | |
| 60 | #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LPXF_BASE |
| 61 | #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB) |
| 62 | |
| 63 | #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LPXF_BASE | \ |
| 64 | BR_PS_8 | \ |
| 65 | BR_MS_GPCM | \ |
| 66 | BR_V) |
| 67 | |
| 68 | #define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_LPXF_SIZE) | \ |
| 69 | OR_GPCM_CSNT | \ |
| 70 | OR_GPCM_ACS_DIV4 | \ |
| 71 | OR_GPCM_SCY_2 | \ |
| 72 | (OR_GPCM_TRLX & \ |
| 73 | (~OR_GPCM_EHTR)) | /* EHTR = 0 */ \ |
| 74 | OR_GPCM_EAD) |
| 75 | |
| 76 | /* LPXF: icache cacheable, but dcache-inhibit and guarded */ |
| 77 | #define CONFIG_SYS_IBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \ |
| 78 | BATL_MEMCOHERENCE) |
| 79 | #define CONFIG_SYS_IBAT5U (CONFIG_SYS_LPXF_BASE | BATU_BL_256M | \ |
| 80 | BATU_VS | BATU_VP) |
| 81 | #define CONFIG_SYS_DBAT5L (CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \ |
| 82 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) |
| 83 | #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U |
| 84 | |
| 85 | /* Bank 3 not used */ |
| 86 | #define CONFIG_SYS_IBAT6L (0) |
| 87 | #define CONFIG_SYS_IBAT6U (0) |
| 88 | #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L |
| 89 | #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U |
| 90 | |
| 91 | #endif /* __CONFIG_H */ |