Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_TEGRA=y | ||||
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 3 | CONFIG_SPL_DM=y |
Masahiro Yamada | 252ed87 | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 4 | CONFIG_TEGRA124=y |
5 | CONFIG_TARGET_NYAN_BIG=y | ||||
Allen Martin | a6c7b46 | 2014-12-04 06:36:30 -0700 | [diff] [blame] | 6 | CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 7 | CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 8 | # CONFIG_CMD_IMI is not set |
9 | # CONFIG_CMD_IMLS is not set | ||||
10 | # CONFIG_CMD_FLASH is not set | ||||
11 | # CONFIG_CMD_FPGA is not set | ||||
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 12 | CONFIG_CMD_GPIO=y |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 13 | # CONFIG_CMD_SETEXPR is not set |
14 | # CONFIG_CMD_NFS is not set | ||||
Simon Glass | d765921 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 15 | CONFIG_CMD_PMIC=y |
16 | CONFIG_CMD_REGULATOR=y | ||||
Simon Glass | f6ac9f1 | 2015-08-22 18:31:44 -0600 | [diff] [blame] | 17 | CONFIG_CMD_TPM=y |
18 | CONFIG_CMD_TPM_TEST=y | ||||
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 19 | CONFIG_CROS_EC_KEYB=y |
Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 20 | CONFIG_CMD_CROS_EC=y |
Simon Glass | b3b9d7c | 2015-06-05 14:39:34 -0600 | [diff] [blame] | 21 | CONFIG_CROS_EC=y |
22 | CONFIG_CROS_EC_SPI=y | ||||
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 23 | CONFIG_SPI_FLASH=y |
Bin Meng | 68d5342 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 24 | CONFIG_SPI_FLASH_WINBOND=y |
Simon Glass | d765921 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 25 | CONFIG_DM_PMIC=y |
26 | CONFIG_DM_REGULATOR=y | ||||
27 | CONFIG_DM_REGULATOR_FIXED=y | ||||
28 | CONFIG_DM_PWM=y | ||||
Simon Glass | 41fa035 | 2016-01-30 16:38:00 -0700 | [diff] [blame] | 29 | CONFIG_PWM_TEGRA=y |
Thomas Chou | 9e39003 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 30 | CONFIG_SYS_NS16550=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 31 | CONFIG_TEGRA114_SPI=y |
Christophe Ricard | 0766ad2 | 2015-10-06 22:54:41 +0200 | [diff] [blame] | 32 | CONFIG_TPM_TIS_INFINEON=y |
Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 33 | CONFIG_USB=y |
34 | CONFIG_DM_USB=y | ||||
Simon Glass | 2dcf143 | 2016-01-21 19:45:00 -0700 | [diff] [blame] | 35 | CONFIG_DISPLAY=y |
Anatolij Gustschin | 7588c31 | 2016-01-25 17:17:22 +0100 | [diff] [blame] | 36 | CONFIG_I2C_EDID=y |
Simon Glass | d765921 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 37 | CONFIG_DM_VIDEO=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 38 | CONFIG_VIDEO_TEGRA124=y |
Simon Glass | d765921 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 39 | CONFIG_VIDEO_BRIDGE=y |
Joe Hershberger | c9bb942 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 40 | CONFIG_USE_PRIVATE_LIBGCC=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 41 | CONFIG_TPM=y |
Simon Glass | d765921 | 2016-01-30 16:37:50 -0700 | [diff] [blame] | 42 | CONFIG_ERRNO_STR=y |