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Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +09001#ifndef __CONFIG_H
2#define __CONFIG_H
3
4#undef DEBUG
5
6#define CONFIG_SH 1
7#define CONFIG_SH4 1
8#define CONFIG_CPU_SH7751 1
9#define CONFIG_CPU_SH_TYPE_R 1
10#define CONFIG_R2DPLUS 1
11#define __LITTLE_ENDIAN__ 1
12
13/*
14 * Command line configuration.
15 */
16#include <config_cmd_default.h>
17
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090018#define CONFIG_CMD_CACHE
19#define CONFIG_CMD_FLASH
20#define CONFIG_CMD_PCI
21#define CONFIG_CMD_NET
22#define CONFIG_CMD_PING
23#define CONFIG_CMD_IDE
24#define CONFIG_CMD_EXT2
25#define CONFIG_DOS_PARTITION
Nobuhiro Iwamatsuc8d47272010-12-08 14:01:12 +090026#define CONFIG_CMD_SH_ZIMAGEBOOT
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090027
28/* SCIF */
Jean-Christophe PLAGNIOL-VILLARD6c58a032008-08-13 01:40:38 +020029#define CONFIG_SCIF_CONSOLE 1
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090030#define CONFIG_BAUDRATE 115200
31#define CONFIG_CONS_SCIF1 1
Helmut Raiger9660e442011-10-20 04:19:47 +000032#define CONFIG_BOARD_LATE_INIT
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090033
34#define CONFIG_BOOTDELAY -1
35#define CONFIG_BOOTARGS "console=ttySC0,115200"
36#define CONFIG_ENV_OVERWRITE 1
37
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090038/* SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
40#define CONFIG_SYS_SDRAM_SIZE (0x04000000)
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090041
Nobuhiro Iwamatsu653f9852011-01-17 20:48:39 +090042#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_LONGHELP
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#define CONFIG_SYS_CBSIZE 256
45#define CONFIG_SYS_PBSIZE 256
46#define CONFIG_SYS_MAXARGS 16
47#define CONFIG_SYS_BARGSIZE 512
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090048
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
Wolfgang Denk14d0a022010-10-07 21:51:12 +020050#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090051
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090053/* Address of u-boot image in Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
55#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090056/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090059
60/*
Nobuhiro Iwamatsu873d97a2008-06-17 16:28:05 +090061 * NOR Flash ( Spantion S29GL256P )
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090062 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020064#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#define CONFIG_SYS_FLASH_BASE (0xA0000000)
66#define CONFIG_SYS_MAX_FLASH_BANKS (1)
67#define CONFIG_SYS_MAX_FLASH_SECT 256
68#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090069
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020070#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020071#define CONFIG_ENV_SECT_SIZE 0x40000
72#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090074
75/*
76 * SuperH Clock setting
77 */
78#define CONFIG_SYS_CLK_FREQ 60000000
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +090079#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
80#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +020081#define CONFIG_SYS_TMU_CLK_DIV 4
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090083
84/*
85 * IDE support
86 */
87#define CONFIG_IDE_RESET 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_PIO_MODE 1
89#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
90#define CONFIG_SYS_IDE_MAXDEVICE 1
91#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
92#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
93#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
94#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
95#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
Albert Aribaudf2a37fc2010-08-08 05:17:05 +053096#define CONFIG_IDE_SWAP_IO
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +090097
98/*
99 * SuperH PCI Bridge Configration
100 */
101#define CONFIG_PCI
102#define CONFIG_SH4_PCI
103#define CONFIG_SH7751_PCI
104#define CONFIG_PCI_PNP
105#define CONFIG_PCI_SCAN_SHOW 1
106#define __io
107#define __mem_pci
108
109#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
110#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
111#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
112#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */
113#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
114#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */
Yoshihiro Shimoda2db0e122009-02-25 16:04:26 +0900115#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
116#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff)
117#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +0900118
119/*
120 * Network device (RTL8139) support
121 */
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +0900122#define CONFIG_RTL8139
Nobuhiro Iwamatsuf5e24662008-03-25 17:11:24 +0900123
124#endif /* __CONFIG_H */