Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2013 Atmel Corporation. |
| 4 | * Josh Wu <josh.wu@atmel.com> |
| 5 | * |
| 6 | * Configuation settings for the AT91SAM9N12-EK boards. |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __AT91SAM9N12_CONFIG_H_ |
| 10 | #define __AT91SAM9N12_CONFIG_H_ |
| 11 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 12 | /* ARM asynchronous clock */ |
| 13 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 14 | #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 15 | |
| 16 | /* Misc CPU related */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 17 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 18 | /* LCD */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 19 | #define LCD_BPP LCD_COLOR16 |
| 20 | #define LCD_OUTPUT_BPP 24 |
| 21 | #define CONFIG_LCD_LOGO |
| 22 | #define CONFIG_LCD_INFO |
| 23 | #define CONFIG_LCD_INFO_BELOW_LOGO |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 24 | #define CONFIG_ATMEL_LCD_RGB565 |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 25 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 26 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 27 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
| 28 | |
| 29 | /* |
| 30 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, |
| 31 | * leaving the correct space for initial global data structure above |
| 32 | * that address while providing maximum stack area below. |
| 33 | */ |
| 34 | # define CONFIG_SYS_INIT_SP_ADDR \ |
Wenyou Yang | e61ed48 | 2017-09-14 11:07:42 +0800 | [diff] [blame] | 35 | (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 36 | |
| 37 | /* DataFlash */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 38 | |
| 39 | /* NAND flash */ |
| 40 | #ifdef CONFIG_CMD_NAND |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 41 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 42 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 43 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 44 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
Andreas Bießmann | ac45bb1 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 45 | #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) |
| 46 | #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 47 | #endif |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 48 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 49 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 50 | "console=console=ttyS0,115200\0" \ |
Tom Rini | 43ede0b | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 51 | "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 52 | "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ |
| 53 | "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" |
| 54 | |
Bo Shen | d9bef0a | 2013-10-21 16:13:59 +0800 | [diff] [blame] | 55 | /* USB host */ |
| 56 | #ifdef CONFIG_CMD_USB |
| 57 | #define CONFIG_USB_ATMEL |
Bo Shen | dcd2f1a | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 58 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
Bo Shen | d9bef0a | 2013-10-21 16:13:59 +0800 | [diff] [blame] | 59 | #define CONFIG_USB_OHCI_NEW |
| 60 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 61 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI |
| 62 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" |
| 63 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
Bo Shen | d9bef0a | 2013-10-21 16:13:59 +0800 | [diff] [blame] | 64 | #endif |
| 65 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 66 | #ifdef CONFIG_SPI_BOOT |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 67 | |
| 68 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 69 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 70 | #elif defined(CONFIG_NAND_BOOT) |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 71 | |
| 72 | /* bootstrap + u-boot + env + linux in nandflash */ |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 73 | #endif |
| 74 | |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 75 | /* SPL */ |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 76 | #define CONFIG_SPL_MAX_SIZE 0x6000 |
| 77 | #define CONFIG_SPL_STACK 0x308000 |
| 78 | |
| 79 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 80 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 81 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
| 82 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 83 | |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 84 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 85 | |
| 86 | #define CONFIG_SYS_MASTER_CLOCK 132096000 |
| 87 | #define CONFIG_SYS_AT91_PLLA 0x20953f03 |
| 88 | #define CONFIG_SYS_MCKR 0x1301 |
| 89 | #define CONFIG_SYS_MCKR_CSS 0x1302 |
| 90 | |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 91 | #ifdef CONFIG_SD_BOOT |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 92 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Wenyou Yang | 5541543 | 2017-09-14 11:07:44 +0800 | [diff] [blame] | 93 | #endif |
Bo Shen | ff255e8 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 94 | |
Wu, Josh | 9e33690 | 2013-04-16 23:42:44 +0000 | [diff] [blame] | 95 | #endif |