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Stefan Roese5568e612005-11-22 13:20:42 +01001/*
2 * (C) Copyright 2005
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <ppc_asm.tmpl>
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020027#include <asm/mmu.h>
Stefan Roese5568e612005-11-22 13:20:42 +010028#include <config.h>
Stefan Roese550650d2010-09-20 16:05:31 +020029#include <asm/ppc4xx.h>
Stefan Roese5568e612005-11-22 13:20:42 +010030
Stefan Roese5568e612005-11-22 13:20:42 +010031/**************************************************************************
32 * TLB TABLE
33 *
34 * This table is used by the cpu boot code to setup the initial tlb
35 * entries. Rather than make broad assumptions in the cpu source tree,
36 * this table lets each board set things up however they like.
37 *
38 * Pointer to the table is returned in r1
39 *
40 *************************************************************************/
41
42 .section .bootpg,"ax"
43 .globl tlbtab
44
45tlbtab:
46 tlbtab_start
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020047 tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG)
48 tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG)
49 tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX )
50 tlbentry( CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX )
51 tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG )
52 tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG )
53 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG )
Stefan Roese5568e612005-11-22 13:20:42 +010054 tlbtab_end