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wdenk1c437712004-01-16 00:30:56 +00001/***********************************************************************
2 *
Detlev Zundel200779e2009-04-03 11:53:01 +02003 * (C) Copyright 2004-2009
wdenk1c437712004-01-16 00:30:56 +00004 * DENX Software Engineering
5 * Wolfgang Denk, wd@denx.de
6 * All rights reserved.
7 *
8 * Simple 16550A serial driver
9 *
10 * Originally from linux source (drivers/char/ps2ser.c)
11 *
12 * Used by the PS/2 multiplexer driver (ps2mult.c)
13 *
14 ***********************************************************************/
15
16#include <common.h>
17
wdenk1c437712004-01-16 00:30:56 +000018#include <asm/io.h>
19#include <asm/atomic.h>
20#include <ps2mult.h>
Detlev Zundel200779e2009-04-03 11:53:01 +020021/* This is needed for ns16550.h */
22#ifndef CONFIG_SYS_NS16550_REG_SIZE
23#define CONFIG_SYS_NS16550_REG_SIZE 1
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020024#endif
Detlev Zundel200779e2009-04-03 11:53:01 +020025#include <ns16550.h>
wdenk1c437712004-01-16 00:30:56 +000026
Wolfgang Denkd87080b2006-03-31 18:32:53 +020027DECLARE_GLOBAL_DATA_PTR;
28
wdenk1c437712004-01-16 00:30:56 +000029/* #define DEBUG */
30
31#define PS2SER_BAUD 57600
32
wdenk7e6bf352004-12-12 22:06:17 +000033#ifdef CONFIG_MPC5xxx
34#if CONFIG_PS2SERIAL == 1
35#define PSC_BASE MPC5XXX_PSC1
36#elif CONFIG_PS2SERIAL == 2
37#define PSC_BASE MPC5XXX_PSC2
38#elif CONFIG_PS2SERIAL == 3
39#define PSC_BASE MPC5XXX_PSC3
40#elif defined(CONFIG_MGT5100)
41#error CONFIG_PS2SERIAL must be in 1, 2 or 3
42#elif CONFIG_PS2SERIAL == 4
43#define PSC_BASE MPC5XXX_PSC4
44#elif CONFIG_PS2SERIAL == 5
45#define PSC_BASE MPC5XXX_PSC5
46#elif CONFIG_PS2SERIAL == 6
47#define PSC_BASE MPC5XXX_PSC6
48#else
49#error CONFIG_PS2SERIAL must be in 1 ... 6
50#endif
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020051
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +020052#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
53 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020054
55#if CONFIG_PS2SERIAL == 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020056#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4500)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020057#elif CONFIG_PS2SERIAL == 2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define COM_BASE (CONFIG_SYS_CCSRBAR+0x4600)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +020059#else
60#error CONFIG_PS2SERIAL must be in 1 ... 2
61#endif
62
Wolfgang Denkbd3143f2006-07-19 14:49:35 +020063#endif /* CONFIG_MPC5xxx / CONFIG_MPC8540 / other */
wdenk7e6bf352004-12-12 22:06:17 +000064
wdenk1c437712004-01-16 00:30:56 +000065static int ps2ser_getc_hw(void);
66static void ps2ser_interrupt(void *dev_id);
67
68extern struct serial_state rs_table[]; /* in serial.c */
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +020069#if !defined(CONFIG_MPC5xxx) && !defined(CONFIG_MPC8540) && \
70 !defined(CONFIG_MPC8541) && !defined(CONFIG_MPC8548) && \
71 !defined(CONFIG_MPC8555)
wdenkef978732004-01-21 20:46:28 +000072static struct serial_state *state;
wdenk7e6bf352004-12-12 22:06:17 +000073#endif
wdenk1c437712004-01-16 00:30:56 +000074
75static u_char ps2buf[PS2BUF_SIZE];
76static atomic_t ps2buf_cnt;
77static int ps2buf_in_idx;
78static int ps2buf_out_idx;
79
wdenk7e6bf352004-12-12 22:06:17 +000080#ifdef CONFIG_MPC5xxx
81int ps2ser_init(void)
82{
wdenk7e6bf352004-12-12 22:06:17 +000083 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
84 unsigned long baseclk;
85 int div;
86
87 /* reset PSC */
88 psc->command = PSC_SEL_MODE_REG_1;
89
90 /* select clock sources */
91#if defined(CONFIG_MGT5100)
92 psc->psc_clock_select = 0xdd00;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020093 baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32;
wdenk7e6bf352004-12-12 22:06:17 +000094#elif defined(CONFIG_MPC5200)
95 psc->psc_clock_select = 0;
96 baseclk = (gd->ipb_clk + 16) / 32;
97#endif
98
99 /* switch to UART mode */
100 psc->sicr = 0;
101
102 /* configure parity, bit length and so on */
103#if defined(CONFIG_MGT5100)
104 psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
105#elif defined(CONFIG_MPC5200)
106 psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
107#endif
108 psc->mode = PSC_MODE_ONE_STOP;
109
110 /* set up UART divisor */
111 div = (baseclk + (PS2SER_BAUD/2)) / PS2SER_BAUD;
112 psc->ctur = (div >> 8) & 0xff;
113 psc->ctlr = div & 0xff;
114
115 /* disable all interrupts */
116 psc->psc_imr = 0;
117
118 /* reset and enable Rx/Tx */
119 psc->command = PSC_RST_RX;
120 psc->command = PSC_RST_TX;
121 psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE;
122
123 return (0);
124}
125
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200126#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
127 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200128int ps2ser_init(void)
129{
130 NS16550_t com_port = (NS16550_t)COM_BASE;
131
132 com_port->ier = 0x00;
Detlev Zundel200779e2009-04-03 11:53:01 +0200133 com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134 com_port->dll = (CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff;
135 com_port->dlm = ((CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff;
Detlev Zundel200779e2009-04-03 11:53:01 +0200136 com_port->lcr = UART_LCR_8N1;
137 com_port->mcr = (UART_MCR_DTR | UART_MCR_RTS);
138 com_port->fcr = (UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR);
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200139
140 return (0);
141}
142
Wolfgang Denkbd3143f2006-07-19 14:49:35 +0200143#else /* !CONFIG_MPC5xxx && !CONFIG_MPC8540 / other */
wdenk1c437712004-01-16 00:30:56 +0000144
145static inline unsigned int ps2ser_in(int offset)
146{
147 return readb((unsigned long) state->iomem_base + offset);
148}
149
150static inline void ps2ser_out(int offset, int value)
151{
152 writeb(value, (unsigned long) state->iomem_base + offset);
153}
154
155int ps2ser_init(void)
156{
wdenkef978732004-01-21 20:46:28 +0000157 int quot;
158 unsigned cval;
159
160 state = rs_table + CONFIG_PS2SERIAL;
161
162 quot = state->baud_base / PS2SER_BAUD;
163 cval = 0x3; /* 8N1 - 8 data bits, no parity bits, 1 stop bit */
wdenk1c437712004-01-16 00:30:56 +0000164
165 /* Set speed, enable interrupts, enable FIFO
166 */
167 ps2ser_out(UART_LCR, cval | UART_LCR_DLAB);
168 ps2ser_out(UART_DLL, quot & 0xff);
169 ps2ser_out(UART_DLM, quot >> 8);
170 ps2ser_out(UART_LCR, cval);
171 ps2ser_out(UART_IER, UART_IER_RDI);
172 ps2ser_out(UART_MCR, UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS);
173 ps2ser_out(UART_FCR,
174 UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
175
176 /* If we read 0xff from the LSR, there is no UART here
177 */
178 if (ps2ser_in(UART_LSR) == 0xff) {
179 printf ("ps2ser.c: no UART found\n");
180 return -1;
181 }
182
183 irq_install_handler(state->irq, ps2ser_interrupt, NULL);
184
185 return 0;
186}
Wolfgang Denkbd3143f2006-07-19 14:49:35 +0200187#endif /* CONFIG_MPC5xxx / CONFIG_MPC8540 / other */
wdenk1c437712004-01-16 00:30:56 +0000188
189void ps2ser_putc(int chr)
190{
wdenk7e6bf352004-12-12 22:06:17 +0000191#ifdef CONFIG_MPC5xxx
192 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200193#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
194 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200195 NS16550_t com_port = (NS16550_t)COM_BASE;
wdenk7e6bf352004-12-12 22:06:17 +0000196#endif
wdenk1c437712004-01-16 00:30:56 +0000197#ifdef DEBUG
198 printf(">>>> 0x%02x\n", chr);
199#endif
200
wdenk7e6bf352004-12-12 22:06:17 +0000201#ifdef CONFIG_MPC5xxx
202 while (!(psc->psc_status & PSC_SR_TXRDY));
wdenkefe2a4d2004-12-16 21:44:03 +0000203
wdenk7e6bf352004-12-12 22:06:17 +0000204 psc->psc_buffer_8 = chr;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200205#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
206 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Detlev Zundel200779e2009-04-03 11:53:01 +0200207 while ((com_port->lsr & UART_LSR_THRE) == 0);
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200208 com_port->thr = chr;
wdenk7e6bf352004-12-12 22:06:17 +0000209#else
wdenk1c437712004-01-16 00:30:56 +0000210 while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE));
211
212 ps2ser_out(UART_TX, chr);
wdenk7e6bf352004-12-12 22:06:17 +0000213#endif
wdenk1c437712004-01-16 00:30:56 +0000214}
215
216static int ps2ser_getc_hw(void)
217{
wdenk7e6bf352004-12-12 22:06:17 +0000218#ifdef CONFIG_MPC5xxx
219 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200220#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
221 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200222 NS16550_t com_port = (NS16550_t)COM_BASE;
wdenk7e6bf352004-12-12 22:06:17 +0000223#endif
wdenk1c437712004-01-16 00:30:56 +0000224 int res = -1;
225
wdenk7e6bf352004-12-12 22:06:17 +0000226#ifdef CONFIG_MPC5xxx
227 if (psc->psc_status & PSC_SR_RXRDY) {
228 res = (psc->psc_buffer_8);
229 }
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200230#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
231 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Detlev Zundel200779e2009-04-03 11:53:01 +0200232 if (com_port->lsr & UART_LSR_DR) {
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200233 res = com_port->rbr;
234 }
wdenk7e6bf352004-12-12 22:06:17 +0000235#else
wdenk1c437712004-01-16 00:30:56 +0000236 if (ps2ser_in(UART_LSR) & UART_LSR_DR) {
237 res = (ps2ser_in(UART_RX));
238 }
wdenk7e6bf352004-12-12 22:06:17 +0000239#endif
wdenk1c437712004-01-16 00:30:56 +0000240
241 return res;
242}
243
244int ps2ser_getc(void)
245{
246 volatile int chr;
247 int flags;
248
249#ifdef DEBUG
250 printf("<< ");
251#endif
252
253 flags = disable_interrupts();
254
255 do {
256 if (atomic_read(&ps2buf_cnt) != 0) {
257 chr = ps2buf[ps2buf_out_idx++];
258 ps2buf_out_idx &= (PS2BUF_SIZE - 1);
259 atomic_dec(&ps2buf_cnt);
260 } else {
261 chr = ps2ser_getc_hw();
262 }
263 }
264 while (chr < 0);
265
266 if (flags) enable_interrupts();
267
268#ifdef DEBUG
269 printf("0x%02x\n", chr);
270#endif
271
272 return chr;
273}
274
275int ps2ser_check(void)
276{
277 int flags;
278
279 flags = disable_interrupts();
280 ps2ser_interrupt(NULL);
281 if (flags) enable_interrupts();
282
283 return atomic_read(&ps2buf_cnt);
284}
285
286static void ps2ser_interrupt(void *dev_id)
287{
wdenk7e6bf352004-12-12 22:06:17 +0000288#ifdef CONFIG_MPC5xxx
289 volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200290#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
291 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200292 NS16550_t com_port = (NS16550_t)COM_BASE;
wdenk7e6bf352004-12-12 22:06:17 +0000293#endif
wdenk1c437712004-01-16 00:30:56 +0000294 int chr;
wdenk7e6bf352004-12-12 22:06:17 +0000295 int status;
wdenk1c437712004-01-16 00:30:56 +0000296
297 do {
298 chr = ps2ser_getc_hw();
wdenk7e6bf352004-12-12 22:06:17 +0000299#ifdef CONFIG_MPC5xxx
300 status = psc->psc_status;
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200301#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
302 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Wolfgang Denkbc8bb6d2006-06-16 16:40:54 +0200303 status = com_port->lsr;
wdenk7e6bf352004-12-12 22:06:17 +0000304#else
305 status = ps2ser_in(UART_IIR);
306#endif
wdenk1c437712004-01-16 00:30:56 +0000307 if (chr < 0) continue;
308
309 if (atomic_read(&ps2buf_cnt) < PS2BUF_SIZE) {
310 ps2buf[ps2buf_in_idx++] = chr;
311 ps2buf_in_idx &= (PS2BUF_SIZE - 1);
312 atomic_inc(&ps2buf_cnt);
313 } else {
314 printf ("ps2ser.c: buffer overflow\n");
315 }
wdenk7e6bf352004-12-12 22:06:17 +0000316#ifdef CONFIG_MPC5xxx
wdenkefe2a4d2004-12-16 21:44:03 +0000317 } while (status & PSC_SR_RXRDY);
Wolfgang Grandegger1287e0c2008-06-05 13:12:07 +0200318#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
319 defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555)
Detlev Zundel200779e2009-04-03 11:53:01 +0200320 } while (status & UART_LSR_DR);
wdenk7e6bf352004-12-12 22:06:17 +0000321#else
322 } while (status & UART_IIR_RDI);
323#endif
wdenk1c437712004-01-16 00:30:56 +0000324
325 if (atomic_read(&ps2buf_cnt)) {
326 ps2mult_callback(atomic_read(&ps2buf_cnt));
327 }
328}