blob: 5b2c56cffc427ee40d4812a0d9119f2e178c3a79 [file] [log] [blame]
Wolfgang Denkd8e7e0f2005-09-26 01:26:56 +02001/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
3 *
4 * (C) Copyright 2003
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
6 *
7 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
11 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
12 * ebenard@eukrea.com - based on s3c24x0's driver
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33/*
34 * IMPORTANT NOTES
35 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
36 * board or this driver will NOT work!
37 * 2 - this driver is intended for use with USB Mass Storage Devices
38 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
39 * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
40 * to activate workaround for bug #41 or this driver will NOT work!
41 */
42
43#include <common.h>
44/* #include <pci.h> no PCI on the S3C24X0 */
45
46#ifdef CONFIG_USB_OHCI
47
48#include <asm/arch/hardware.h>
49
50#include <malloc.h>
51#include <usb.h>
52#include "usb_ohci.h"
53
54#define OHCI_USE_NPS /* force NoPowerSwitching mode */
55#undef OHCI_VERBOSE_DEBUG /* not always helpful */
56
57/* For initializing controller (mask in an HCFS mode too) */
58#define OHCI_CONTROL_INIT \
59 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
60
61#define readl(a) (*((vu_long *)(a)))
62#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
63
64#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
65
66#undef DEBUG
67#ifdef DEBUG
68#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
69#else
70#define dbg(format, arg...) do {} while(0)
71#endif /* DEBUG */
72#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
73#undef SHOW_INFO
74#ifdef SHOW_INFO
75#define info(format, arg...) printf("INFO: " format "\n", ## arg)
76#else
77#define info(format, arg...) do {} while(0)
78#endif
79
80#define m16_swap(x) swap_16(x)
81#define m32_swap(x) swap_32(x)
82
83/* global ohci_t */
84static ohci_t gohci;
85/* this must be aligned to a 256 byte boundary */
86struct ohci_hcca ghcca[1];
87/* a pointer to the aligned storage */
88struct ohci_hcca *phcca;
89/* this allocates EDs for all possible endpoints */
90struct ohci_device ohci_dev;
91/* urb_priv */
92urb_priv_t urb_priv;
93/* RHSC flag */
94int got_rhsc;
95/* device which was disconnected */
96struct usb_device *devgone;
97
98/*-------------------------------------------------------------------------*/
99
100/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
101 * The erratum (#4) description is incorrect. AMD's workaround waits
102 * till some bits (mostly reserved) are clear; ok for all revs.
103 */
104#define OHCI_QUIRK_AMD756 0xabcd
105#define read_roothub(hc, register, mask) ({ \
106 u32 temp = readl (&hc->regs->roothub.register); \
107 if (hc->flags & OHCI_QUIRK_AMD756) \
108 while (temp & mask) \
109 temp = readl (&hc->regs->roothub.register); \
110 temp; })
111
112static u32 roothub_a (struct ohci *hc)
113 { return read_roothub (hc, a, 0xfc0fe000); }
114static inline u32 roothub_b (struct ohci *hc)
115 { return readl (&hc->regs->roothub.b); }
116static inline u32 roothub_status (struct ohci *hc)
117 { return readl (&hc->regs->roothub.status); }
118static u32 roothub_portstatus (struct ohci *hc, int i)
119 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
120
121
122/* forward declaration */
123static int hc_interrupt (void);
124static void
125td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
126 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
127
128/*-------------------------------------------------------------------------*
129 * URB support functions
130 *-------------------------------------------------------------------------*/
131
132/* free HCD-private data associated with this URB */
133
134static void urb_free_priv (urb_priv_t * urb)
135{
136 int i;
137 int last;
138 struct td * td;
139
140 last = urb->length - 1;
141 if (last >= 0) {
142 for (i = 0; i <= last; i++) {
143 td = urb->td[i];
144 if (td) {
145 td->usb_dev = NULL;
146 urb->td[i] = NULL;
147 }
148 }
149 }
150}
151
152/*-------------------------------------------------------------------------*/
153
154#ifdef DEBUG
155static int sohci_get_current_frame_number (struct usb_device * dev);
156
157/* debug| print the main components of an URB
158 * small: 0) header + data packets 1) just header */
159
160static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
161 int transfer_len, struct devrequest * setup, char * str, int small)
162{
163 urb_priv_t * purb = &urb_priv;
164
165 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
166 str,
167 sohci_get_current_frame_number (dev),
168 usb_pipedevice (pipe),
169 usb_pipeendpoint (pipe),
170 usb_pipeout (pipe)? 'O': 'I',
171 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
172 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
173 purb->actual_length,
174 transfer_len, dev->status);
175#ifdef OHCI_VERBOSE_DEBUG
176 if (!small) {
177 int i, len;
178
179 if (usb_pipecontrol (pipe)) {
180 printf (__FILE__ ": cmd(8):");
181 for (i = 0; i < 8 ; i++)
182 printf (" %02x", ((__u8 *) setup) [i]);
183 printf ("\n");
184 }
185 if (transfer_len > 0 && buffer) {
186 printf (__FILE__ ": data(%d/%d):",
187 purb->actual_length,
188 transfer_len);
189 len = usb_pipeout (pipe)?
190 transfer_len: purb->actual_length;
191 for (i = 0; i < 16 && i < len; i++)
192 printf (" %02x", ((__u8 *) buffer) [i]);
193 printf ("%s\n", i < len? "...": "");
194 }
195 }
196#endif
197}
198
199/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
200void ep_print_int_eds (ohci_t *ohci, char * str) {
201 int i, j;
202 __u32 * ed_p;
203 for (i= 0; i < 32; i++) {
204 j = 5;
205 ed_p = &(ohci->hcca->int_table [i]);
206 if (*ed_p == 0)
207 continue;
208 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
209 while (*ed_p != 0 && j--) {
210 ed_t *ed = (ed_t *)m32_swap(ed_p);
211 printf (" ed: %4x;", ed->hwINFO);
212 ed_p = &ed->hwNextED;
213 }
214 printf ("\n");
215 }
216}
217
218static void ohci_dump_intr_mask (char *label, __u32 mask)
219{
220 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
221 label,
222 mask,
223 (mask & OHCI_INTR_MIE) ? " MIE" : "",
224 (mask & OHCI_INTR_OC) ? " OC" : "",
225 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
226 (mask & OHCI_INTR_FNO) ? " FNO" : "",
227 (mask & OHCI_INTR_UE) ? " UE" : "",
228 (mask & OHCI_INTR_RD) ? " RD" : "",
229 (mask & OHCI_INTR_SF) ? " SF" : "",
230 (mask & OHCI_INTR_WDH) ? " WDH" : "",
231 (mask & OHCI_INTR_SO) ? " SO" : ""
232 );
233}
234
235static void maybe_print_eds (char *label, __u32 value)
236{
237 ed_t *edp = (ed_t *)value;
238
239 if (value) {
240 dbg ("%s %08x", label, value);
241 dbg ("%08x", edp->hwINFO);
242 dbg ("%08x", edp->hwTailP);
243 dbg ("%08x", edp->hwHeadP);
244 dbg ("%08x", edp->hwNextED);
245 }
246}
247
248static char * hcfs2string (int state)
249{
250 switch (state) {
251 case OHCI_USB_RESET: return "reset";
252 case OHCI_USB_RESUME: return "resume";
253 case OHCI_USB_OPER: return "operational";
254 case OHCI_USB_SUSPEND: return "suspend";
255 }
256 return "?";
257}
258
259/* dump control and status registers */
260static void ohci_dump_status (ohci_t *controller)
261{
262 struct ohci_regs *regs = controller->regs;
263 __u32 temp;
264
265 temp = readl (&regs->revision) & 0xff;
266 if (temp != 0x10)
267 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
268
269 temp = readl (&regs->control);
270 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
271 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
272 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
273 (temp & OHCI_CTRL_IR) ? " IR" : "",
274 hcfs2string (temp & OHCI_CTRL_HCFS),
275 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
276 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
277 (temp & OHCI_CTRL_IE) ? " IE" : "",
278 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
279 temp & OHCI_CTRL_CBSR
280 );
281
282 temp = readl (&regs->cmdstatus);
283 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
284 (temp & OHCI_SOC) >> 16,
285 (temp & OHCI_OCR) ? " OCR" : "",
286 (temp & OHCI_BLF) ? " BLF" : "",
287 (temp & OHCI_CLF) ? " CLF" : "",
288 (temp & OHCI_HCR) ? " HCR" : ""
289 );
290
291 ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
292 ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
293
294 maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
295
296 maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
297 maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
298
299 maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
300 maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
301
302 maybe_print_eds ("donehead", readl (&regs->donehead));
303}
304
305static void ohci_dump_roothub (ohci_t *controller, int verbose)
306{
307 __u32 temp, ndp, i;
308
309 temp = roothub_a (controller);
310 ndp = (temp & RH_A_NDP);
311#ifdef CONFIG_AT91C_PQFP_UHPBUG
312 ndp = (ndp == 2) ? 1:0;
313#endif
314 if (verbose) {
315 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
316 ((temp & RH_A_POTPGT) >> 24) & 0xff,
317 (temp & RH_A_NOCP) ? " NOCP" : "",
318 (temp & RH_A_OCPM) ? " OCPM" : "",
319 (temp & RH_A_DT) ? " DT" : "",
320 (temp & RH_A_NPS) ? " NPS" : "",
321 (temp & RH_A_PSM) ? " PSM" : "",
322 ndp
323 );
324 temp = roothub_b (controller);
325 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
326 temp,
327 (temp & RH_B_PPCM) >> 16,
328 (temp & RH_B_DR)
329 );
330 temp = roothub_status (controller);
331 dbg ("roothub.status: %08x%s%s%s%s%s%s",
332 temp,
333 (temp & RH_HS_CRWE) ? " CRWE" : "",
334 (temp & RH_HS_OCIC) ? " OCIC" : "",
335 (temp & RH_HS_LPSC) ? " LPSC" : "",
336 (temp & RH_HS_DRWE) ? " DRWE" : "",
337 (temp & RH_HS_OCI) ? " OCI" : "",
338 (temp & RH_HS_LPS) ? " LPS" : ""
339 );
340 }
341
342 for (i = 0; i < ndp; i++) {
343 temp = roothub_portstatus (controller, i);
344 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
345 i,
346 temp,
347 (temp & RH_PS_PRSC) ? " PRSC" : "",
348 (temp & RH_PS_OCIC) ? " OCIC" : "",
349 (temp & RH_PS_PSSC) ? " PSSC" : "",
350 (temp & RH_PS_PESC) ? " PESC" : "",
351 (temp & RH_PS_CSC) ? " CSC" : "",
352
353 (temp & RH_PS_LSDA) ? " LSDA" : "",
354 (temp & RH_PS_PPS) ? " PPS" : "",
355 (temp & RH_PS_PRS) ? " PRS" : "",
356 (temp & RH_PS_POCI) ? " POCI" : "",
357 (temp & RH_PS_PSS) ? " PSS" : "",
358
359 (temp & RH_PS_PES) ? " PES" : "",
360 (temp & RH_PS_CCS) ? " CCS" : ""
361 );
362 }
363}
364
365static void ohci_dump (ohci_t *controller, int verbose)
366{
367 dbg ("OHCI controller usb-%s state", controller->slot_name);
368
369 /* dumps some of the state we know about */
370 ohci_dump_status (controller);
371 if (verbose)
372 ep_print_int_eds (controller, "hcca");
373 dbg ("hcca frame #%04x", controller->hcca->frame_no);
374 ohci_dump_roothub (controller, 1);
375}
376
377
378#endif /* DEBUG */
379
380/*-------------------------------------------------------------------------*
381 * Interface functions (URB)
382 *-------------------------------------------------------------------------*/
383
384/* get a transfer request */
385
386int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
387 int transfer_len, struct devrequest *setup, int interval)
388{
389 ohci_t *ohci;
390 ed_t * ed;
391 urb_priv_t *purb_priv;
392 int i, size = 0;
393
394 ohci = &gohci;
395
396 /* when controller's hung, permit only roothub cleanup attempts
397 * such as powering down ports */
398 if (ohci->disabled) {
399 err("sohci_submit_job: EPIPE");
400 return -1;
401 }
402
403 /* every endpoint has a ed, locate and fill it */
404 if (!(ed = ep_add_ed (dev, pipe))) {
405 err("sohci_submit_job: ENOMEM");
406 return -1;
407 }
408
409 /* for the private part of the URB we need the number of TDs (size) */
410 switch (usb_pipetype (pipe)) {
411 case PIPE_BULK: /* one TD for every 4096 Byte */
412 size = (transfer_len - 1) / 4096 + 1;
413 break;
414 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
415 size = (transfer_len == 0)? 2:
416 (transfer_len - 1) / 4096 + 3;
417 break;
418 }
419
420 if (size >= (N_URB_TD - 1)) {
421 err("need %d TDs, only have %d", size, N_URB_TD);
422 return -1;
423 }
424 purb_priv = &urb_priv;
425 purb_priv->pipe = pipe;
426
427 /* fill the private part of the URB */
428 purb_priv->length = size;
429 purb_priv->ed = ed;
430 purb_priv->actual_length = 0;
431
432 /* allocate the TDs */
433 /* note that td[0] was allocated in ep_add_ed */
434 for (i = 0; i < size; i++) {
435 purb_priv->td[i] = td_alloc (dev);
436 if (!purb_priv->td[i]) {
437 purb_priv->length = i;
438 urb_free_priv (purb_priv);
439 err("sohci_submit_job: ENOMEM");
440 return -1;
441 }
442 }
443
444 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
445 urb_free_priv (purb_priv);
446 err("sohci_submit_job: EINVAL");
447 return -1;
448 }
449
450 /* link the ed into a chain if is not already */
451 if (ed->state != ED_OPER)
452 ep_link (ohci, ed);
453
454 /* fill the TDs and link it to the ed */
455 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
456
457 return 0;
458}
459
460/*-------------------------------------------------------------------------*/
461
462#ifdef DEBUG
463/* tell us the current USB frame number */
464
465static int sohci_get_current_frame_number (struct usb_device *usb_dev)
466{
467 ohci_t *ohci = &gohci;
468
469 return m16_swap (ohci->hcca->frame_no);
470}
471#endif
472
473/*-------------------------------------------------------------------------*
474 * ED handling functions
475 *-------------------------------------------------------------------------*/
476
477/* link an ed into one of the HC chains */
478
479static int ep_link (ohci_t *ohci, ed_t *edi)
480{
481 volatile ed_t *ed = edi;
482
483 ed->state = ED_OPER;
484
485 switch (ed->type) {
486 case PIPE_CONTROL:
487 ed->hwNextED = 0;
488 if (ohci->ed_controltail == NULL) {
489 writel (ed, &ohci->regs->ed_controlhead);
490 } else {
491 ohci->ed_controltail->hwNextED = m32_swap (ed);
492 }
493 ed->ed_prev = ohci->ed_controltail;
494 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
495 !ohci->ed_rm_list[1] && !ohci->sleeping) {
496 ohci->hc_control |= OHCI_CTRL_CLE;
497 writel (ohci->hc_control, &ohci->regs->control);
498 }
499 ohci->ed_controltail = edi;
500 break;
501
502 case PIPE_BULK:
503 ed->hwNextED = 0;
504 if (ohci->ed_bulktail == NULL) {
505 writel (ed, &ohci->regs->ed_bulkhead);
506 } else {
507 ohci->ed_bulktail->hwNextED = m32_swap (ed);
508 }
509 ed->ed_prev = ohci->ed_bulktail;
510 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
511 !ohci->ed_rm_list[1] && !ohci->sleeping) {
512 ohci->hc_control |= OHCI_CTRL_BLE;
513 writel (ohci->hc_control, &ohci->regs->control);
514 }
515 ohci->ed_bulktail = edi;
516 break;
517 }
518 return 0;
519}
520
521/*-------------------------------------------------------------------------*/
522
523/* unlink an ed from one of the HC chains.
524 * just the link to the ed is unlinked.
525 * the link from the ed still points to another operational ed or 0
526 * so the HC can eventually finish the processing of the unlinked ed */
527
528static int ep_unlink (ohci_t *ohci, ed_t *ed)
529{
530 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
531
532 switch (ed->type) {
533 case PIPE_CONTROL:
534 if (ed->ed_prev == NULL) {
535 if (!ed->hwNextED) {
536 ohci->hc_control &= ~OHCI_CTRL_CLE;
537 writel (ohci->hc_control, &ohci->regs->control);
538 }
539 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
540 } else {
541 ed->ed_prev->hwNextED = ed->hwNextED;
542 }
543 if (ohci->ed_controltail == ed) {
544 ohci->ed_controltail = ed->ed_prev;
545 } else {
546 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
547 }
548 break;
549
550 case PIPE_BULK:
551 if (ed->ed_prev == NULL) {
552 if (!ed->hwNextED) {
553 ohci->hc_control &= ~OHCI_CTRL_BLE;
554 writel (ohci->hc_control, &ohci->regs->control);
555 }
556 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
557 } else {
558 ed->ed_prev->hwNextED = ed->hwNextED;
559 }
560 if (ohci->ed_bulktail == ed) {
561 ohci->ed_bulktail = ed->ed_prev;
562 } else {
563 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
564 }
565 break;
566 }
567 ed->state = ED_UNLINK;
568 return 0;
569}
570
571
572/*-------------------------------------------------------------------------*/
573
574/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
575 * but the USB stack is a little bit stateless so we do it at every transaction
576 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
577 * in all other cases the state is left unchanged
578 * the ed info fields are setted anyway even though most of them should not change */
579
580static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
581{
582 td_t *td;
583 ed_t *ed_ret;
584 volatile ed_t *ed;
585
586 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
587 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
588
589 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
590 err("ep_add_ed: pending delete");
591 /* pending delete request */
592 return NULL;
593 }
594
595 if (ed->state == ED_NEW) {
596 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
597 /* dummy td; end of td list for ed */
598 td = td_alloc (usb_dev);
599 ed->hwTailP = m32_swap (td);
600 ed->hwHeadP = ed->hwTailP;
601 ed->state = ED_UNLINK;
602 ed->type = usb_pipetype (pipe);
603 ohci_dev.ed_cnt++;
604 }
605
606 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
607 | usb_pipeendpoint (pipe) << 7
608 | (usb_pipeisoc (pipe)? 0x8000: 0)
609 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
610 | usb_pipeslow (pipe) << 13
611 | usb_maxpacket (usb_dev, pipe) << 16);
612
613 return ed_ret;
614}
615
616/*-------------------------------------------------------------------------*
617 * TD handling functions
618 *-------------------------------------------------------------------------*/
619
620/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
621
622static void td_fill (ohci_t *ohci, unsigned int info,
623 void *data, int len,
624 struct usb_device *dev, int index, urb_priv_t *urb_priv)
625{
626 volatile td_t *td, *td_pt;
627#ifdef OHCI_FILL_TRACE
628 int i;
629#endif
630
631 if (index > urb_priv->length) {
632 err("index > length");
633 return;
634 }
635 /* use this td as the next dummy */
636 td_pt = urb_priv->td [index];
637 td_pt->hwNextTD = 0;
638
639 /* fill the old dummy TD */
640 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
641
642 td->ed = urb_priv->ed;
643 td->next_dl_td = NULL;
644 td->index = index;
645 td->data = (__u32)data;
646#ifdef OHCI_FILL_TRACE
647 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
648 for (i = 0; i < len; i++)
649 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
650 printf("\n");
651 }
652#endif
653 if (!len)
654 data = 0;
655
656 td->hwINFO = m32_swap (info);
657 td->hwCBP = m32_swap (data);
658 if (data)
659 td->hwBE = m32_swap (data + len - 1);
660 else
661 td->hwBE = 0;
662 td->hwNextTD = m32_swap (td_pt);
663 td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
664
665 /* append to queue */
666 td->ed->hwTailP = td->hwNextTD;
667}
668
669/*-------------------------------------------------------------------------*/
670
671/* prepare all TDs of a transfer */
672
673static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
674 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
675{
676 ohci_t *ohci = &gohci;
677 int data_len = transfer_len;
678 void *data;
679 int cnt = 0;
680 __u32 info = 0;
681 unsigned int toggle = 0;
682
683 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
684 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
685 toggle = TD_T_TOGGLE;
686 } else {
687 toggle = TD_T_DATA0;
688 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
689 }
690 urb->td_cnt = 0;
691 if (data_len)
692 data = buffer;
693 else
694 data = 0;
695
696 switch (usb_pipetype (pipe)) {
697 case PIPE_BULK:
698 info = usb_pipeout (pipe)?
699 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
700 while(data_len > 4096) {
701 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
702 data += 4096; data_len -= 4096; cnt++;
703 }
704 info = usb_pipeout (pipe)?
705 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
706 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
707 cnt++;
708
709 if (!ohci->sleeping)
710 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
711 break;
712
713 case PIPE_CONTROL:
714 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
715 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
716 if (data_len > 0) {
717 info = usb_pipeout (pipe)?
718 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
719 /* NOTE: mishandles transfers >8K, some >4K */
720 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
721 }
722 info = usb_pipeout (pipe)?
723 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
724 td_fill (ohci, info, data, 0, dev, cnt++, urb);
725 if (!ohci->sleeping)
726 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
727 break;
728 }
729 if (urb->length != cnt)
730 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
731}
732
733/*-------------------------------------------------------------------------*
734 * Done List handling functions
735 *-------------------------------------------------------------------------*/
736
737
738/* calculate the transfer length and update the urb */
739
740static void dl_transfer_length(td_t * td)
741{
742 __u32 tdINFO, tdBE, tdCBP;
743 urb_priv_t *lurb_priv = &urb_priv;
744
745 tdINFO = m32_swap (td->hwINFO);
746 tdBE = m32_swap (td->hwBE);
747 tdCBP = m32_swap (td->hwCBP);
748
749
750 if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
751 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
752 if (tdBE != 0) {
753 if (td->hwCBP == 0)
754 lurb_priv->actual_length += tdBE - td->data + 1;
755 else
756 lurb_priv->actual_length += tdCBP - td->data;
757 }
758 }
759}
760
761/*-------------------------------------------------------------------------*/
762
763/* replies to the request have to be on a FIFO basis so
764 * we reverse the reversed done-list */
765
766static td_t * dl_reverse_done_list (ohci_t *ohci)
767{
768 __u32 td_list_hc;
769 td_t *td_rev = NULL;
770 td_t *td_list = NULL;
771 urb_priv_t *lurb_priv = NULL;
772
773 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
774 ohci->hcca->done_head = 0;
775
776 while (td_list_hc) {
777 td_list = (td_t *)td_list_hc;
778
779 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
780 lurb_priv = &urb_priv;
781 dbg(" USB-error/status: %x : %p",
782 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
783 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
784 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
785 td_list->ed->hwHeadP =
786 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
787 (td_list->ed->hwHeadP & m32_swap (0x2));
788 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
789 } else
790 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
791 }
792 }
793
794 td_list->next_dl_td = td_rev;
795 td_rev = td_list;
796 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
797 }
798 return td_list;
799}
800
801/*-------------------------------------------------------------------------*/
802
803/* td done list */
804static int dl_done_list (ohci_t *ohci, td_t *td_list)
805{
806 td_t *td_list_next = NULL;
807 ed_t *ed;
808 int cc = 0;
809 int stat = 0;
810 /* urb_t *urb; */
811 urb_priv_t *lurb_priv;
812 __u32 tdINFO, edHeadP, edTailP;
813
814 while (td_list) {
815 td_list_next = td_list->next_dl_td;
816
817 lurb_priv = &urb_priv;
818 tdINFO = m32_swap (td_list->hwINFO);
819
820 ed = td_list->ed;
821
822 dl_transfer_length(td_list);
823
824 /* error code of transfer */
825 cc = TD_CC_GET (tdINFO);
826 if (cc != 0) {
827 dbg("ConditionCode %#x", cc);
828 stat = cc_to_error[cc];
829 }
830
831 if (ed->state != ED_NEW) {
832 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
833 edTailP = m32_swap (ed->hwTailP);
834
835 /* unlink eds if they are not busy */
836 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
837 ep_unlink (ohci, ed);
838 }
839
840 td_list = td_list_next;
841 }
842 return stat;
843}
844
845/*-------------------------------------------------------------------------*
846 * Virtual Root Hub
847 *-------------------------------------------------------------------------*/
848
849/* Device descriptor */
850static __u8 root_hub_dev_des[] =
851{
852 0x12, /* __u8 bLength; */
853 0x01, /* __u8 bDescriptorType; Device */
854 0x10, /* __u16 bcdUSB; v1.1 */
855 0x01,
856 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
857 0x00, /* __u8 bDeviceSubClass; */
858 0x00, /* __u8 bDeviceProtocol; */
859 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
860 0x00, /* __u16 idVendor; */
861 0x00,
862 0x00, /* __u16 idProduct; */
863 0x00,
864 0x00, /* __u16 bcdDevice; */
865 0x00,
866 0x00, /* __u8 iManufacturer; */
867 0x01, /* __u8 iProduct; */
868 0x00, /* __u8 iSerialNumber; */
869 0x01 /* __u8 bNumConfigurations; */
870};
871
872
873/* Configuration descriptor */
874static __u8 root_hub_config_des[] =
875{
876 0x09, /* __u8 bLength; */
877 0x02, /* __u8 bDescriptorType; Configuration */
878 0x19, /* __u16 wTotalLength; */
879 0x00,
880 0x01, /* __u8 bNumInterfaces; */
881 0x01, /* __u8 bConfigurationValue; */
882 0x00, /* __u8 iConfiguration; */
883 0x40, /* __u8 bmAttributes;
884 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
885 0x00, /* __u8 MaxPower; */
886
887 /* interface */
888 0x09, /* __u8 if_bLength; */
889 0x04, /* __u8 if_bDescriptorType; Interface */
890 0x00, /* __u8 if_bInterfaceNumber; */
891 0x00, /* __u8 if_bAlternateSetting; */
892 0x01, /* __u8 if_bNumEndpoints; */
893 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
894 0x00, /* __u8 if_bInterfaceSubClass; */
895 0x00, /* __u8 if_bInterfaceProtocol; */
896 0x00, /* __u8 if_iInterface; */
897
898 /* endpoint */
899 0x07, /* __u8 ep_bLength; */
900 0x05, /* __u8 ep_bDescriptorType; Endpoint */
901 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
902 0x03, /* __u8 ep_bmAttributes; Interrupt */
903 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
904 0x00,
905 0xff /* __u8 ep_bInterval; 255 ms */
906};
907
908static unsigned char root_hub_str_index0[] =
909{
910 0x04, /* __u8 bLength; */
911 0x03, /* __u8 bDescriptorType; String-descriptor */
912 0x09, /* __u8 lang ID */
913 0x04, /* __u8 lang ID */
914};
915
916static unsigned char root_hub_str_index1[] =
917{
918 28, /* __u8 bLength; */
919 0x03, /* __u8 bDescriptorType; String-descriptor */
920 'O', /* __u8 Unicode */
921 0, /* __u8 Unicode */
922 'H', /* __u8 Unicode */
923 0, /* __u8 Unicode */
924 'C', /* __u8 Unicode */
925 0, /* __u8 Unicode */
926 'I', /* __u8 Unicode */
927 0, /* __u8 Unicode */
928 ' ', /* __u8 Unicode */
929 0, /* __u8 Unicode */
930 'R', /* __u8 Unicode */
931 0, /* __u8 Unicode */
932 'o', /* __u8 Unicode */
933 0, /* __u8 Unicode */
934 'o', /* __u8 Unicode */
935 0, /* __u8 Unicode */
936 't', /* __u8 Unicode */
937 0, /* __u8 Unicode */
938 ' ', /* __u8 Unicode */
939 0, /* __u8 Unicode */
940 'H', /* __u8 Unicode */
941 0, /* __u8 Unicode */
942 'u', /* __u8 Unicode */
943 0, /* __u8 Unicode */
944 'b', /* __u8 Unicode */
945 0, /* __u8 Unicode */
946};
947
948/* Hub class-specific descriptor is constructed dynamically */
949
950
951/*-------------------------------------------------------------------------*/
952
953#define OK(x) len = (x); break
954#ifdef DEBUG
955#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
956#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
957#else
958#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
959#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
960#endif
961#define RD_RH_STAT roothub_status(&gohci)
962#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
963
964/* request to virtual root hub */
965
966int rh_check_port_status(ohci_t *controller)
967{
968 __u32 temp, ndp, i;
969 int res;
970
971 res = -1;
972 temp = roothub_a (controller);
973 ndp = (temp & RH_A_NDP);
974#ifdef CONFIG_AT91C_PQFP_UHPBUG
975 ndp = (ndp == 2) ? 1:0;
976#endif
977
978 for (i = 0; i < ndp; i++) {
979 temp = roothub_portstatus (controller, i);
980 /* check for a device disconnect */
981 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
982 (RH_PS_PESC | RH_PS_CSC)) &&
983 ((temp & RH_PS_CCS) == 0)) {
984 res = i;
985 break;
986 }
987 }
988 return res;
989}
990
991static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
992 void *buffer, int transfer_len, struct devrequest *cmd)
993{
994 void * data = buffer;
995 int leni = transfer_len;
996 int len = 0;
997 int stat = 0;
998 __u32 datab[4];
999 __u8 *data_buf = (__u8 *)datab;
1000 __u16 bmRType_bReq;
1001 __u16 wValue;
1002 __u16 wIndex;
1003 __u16 wLength;
1004
1005#ifdef DEBUG
1006urb_priv.actual_length = 0;
1007pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1008#else
1009 wait_ms(1);
1010#endif
1011 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1012 info("Root-Hub submit IRQ: NOT implemented");
1013 return 0;
1014 }
1015
1016 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1017 wValue = m16_swap (cmd->value);
1018 wIndex = m16_swap (cmd->index);
1019 wLength = m16_swap (cmd->length);
1020
1021 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1022 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1023
1024 switch (bmRType_bReq) {
1025 /* Request Destination:
1026 without flags: Device,
1027 RH_INTERFACE: interface,
1028 RH_ENDPOINT: endpoint,
1029 RH_CLASS means HUB here,
1030 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1031 */
1032
1033 case RH_GET_STATUS:
1034 *(__u16 *) data_buf = m16_swap (1); OK (2);
1035 case RH_GET_STATUS | RH_INTERFACE:
1036 *(__u16 *) data_buf = m16_swap (0); OK (2);
1037 case RH_GET_STATUS | RH_ENDPOINT:
1038 *(__u16 *) data_buf = m16_swap (0); OK (2);
1039 case RH_GET_STATUS | RH_CLASS:
1040 *(__u32 *) data_buf = m32_swap (
1041 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1042 OK (4);
1043 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1044 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1045
1046 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1047 switch (wValue) {
1048 case (RH_ENDPOINT_STALL): OK (0);
1049 }
1050 break;
1051
1052 case RH_CLEAR_FEATURE | RH_CLASS:
1053 switch (wValue) {
1054 case RH_C_HUB_LOCAL_POWER:
1055 OK(0);
1056 case (RH_C_HUB_OVER_CURRENT):
1057 WR_RH_STAT(RH_HS_OCIC); OK (0);
1058 }
1059 break;
1060
1061 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1062 switch (wValue) {
1063 case (RH_PORT_ENABLE):
1064 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1065 case (RH_PORT_SUSPEND):
1066 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1067 case (RH_PORT_POWER):
1068 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1069 case (RH_C_PORT_CONNECTION):
1070 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1071 case (RH_C_PORT_ENABLE):
1072 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1073 case (RH_C_PORT_SUSPEND):
1074 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1075 case (RH_C_PORT_OVER_CURRENT):
1076 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1077 case (RH_C_PORT_RESET):
1078 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1079 }
1080 break;
1081
1082 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1083 switch (wValue) {
1084 case (RH_PORT_SUSPEND):
1085 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1086 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1087 if (RD_RH_PORTSTAT & RH_PS_CCS)
1088 WR_RH_PORTSTAT (RH_PS_PRS);
1089 OK (0);
1090 case (RH_PORT_POWER):
1091 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1092 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1093 if (RD_RH_PORTSTAT & RH_PS_CCS)
1094 WR_RH_PORTSTAT (RH_PS_PES );
1095 OK (0);
1096 }
1097 break;
1098
1099 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1100
1101 case RH_GET_DESCRIPTOR:
1102 switch ((wValue & 0xff00) >> 8) {
1103 case (0x01): /* device descriptor */
1104 len = min_t(unsigned int,
1105 leni,
1106 min_t(unsigned int,
1107 sizeof (root_hub_dev_des),
1108 wLength));
1109 data_buf = root_hub_dev_des; OK(len);
1110 case (0x02): /* configuration descriptor */
1111 len = min_t(unsigned int,
1112 leni,
1113 min_t(unsigned int,
1114 sizeof (root_hub_config_des),
1115 wLength));
1116 data_buf = root_hub_config_des; OK(len);
1117 case (0x03): /* string descriptors */
1118 if(wValue==0x0300) {
1119 len = min_t(unsigned int,
1120 leni,
1121 min_t(unsigned int,
1122 sizeof (root_hub_str_index0),
1123 wLength));
1124 data_buf = root_hub_str_index0;
1125 OK(len);
1126 }
1127 if(wValue==0x0301) {
1128 len = min_t(unsigned int,
1129 leni,
1130 min_t(unsigned int,
1131 sizeof (root_hub_str_index1),
1132 wLength));
1133 data_buf = root_hub_str_index1;
1134 OK(len);
1135 }
1136 default:
1137 stat = USB_ST_STALLED;
1138 }
1139 break;
1140
1141 case RH_GET_DESCRIPTOR | RH_CLASS:
1142 {
1143 __u32 temp = roothub_a (&gohci);
1144
1145 data_buf [0] = 9; /* min length; */
1146 data_buf [1] = 0x29;
1147 data_buf [2] = temp & RH_A_NDP;
1148#ifdef CONFIG_AT91C_PQFP_UHPBUG
1149 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1150#endif
1151 data_buf [3] = 0;
1152 if (temp & RH_A_PSM) /* per-port power switching? */
1153 data_buf [3] |= 0x1;
1154 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1155 data_buf [3] |= 0x10;
1156 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1157 data_buf [3] |= 0x8;
1158
1159 /* corresponds to data_buf[4-7] */
1160 datab [1] = 0;
1161 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1162 temp = roothub_b (&gohci);
1163 data_buf [7] = temp & RH_B_DR;
1164 if (data_buf [2] < 7) {
1165 data_buf [8] = 0xff;
1166 } else {
1167 data_buf [0] += 2;
1168 data_buf [8] = (temp & RH_B_DR) >> 8;
1169 data_buf [10] = data_buf [9] = 0xff;
1170 }
1171
1172 len = min_t(unsigned int, leni,
1173 min_t(unsigned int, data_buf [0], wLength));
1174 OK (len);
1175 }
1176
1177 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1178
1179 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1180
1181 default:
1182 dbg ("unsupported root hub command");
1183 stat = USB_ST_STALLED;
1184 }
1185
1186#ifdef DEBUG
1187 ohci_dump_roothub (&gohci, 1);
1188#else
1189 wait_ms(1);
1190#endif
1191
1192 len = min_t(int, len, leni);
1193 if (data != data_buf)
1194 memcpy (data, data_buf, len);
1195 dev->act_len = len;
1196 dev->status = stat;
1197
1198#ifdef DEBUG
1199 if (transfer_len)
1200 urb_priv.actual_length = transfer_len;
1201 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1202#else
1203 wait_ms(1);
1204#endif
1205
1206 return stat;
1207}
1208
1209/*-------------------------------------------------------------------------*/
1210
1211/* common code for handling submit messages - used for all but root hub */
1212/* accesses. */
1213int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1214 int transfer_len, struct devrequest *setup, int interval)
1215{
1216 int stat = 0;
1217 int maxsize = usb_maxpacket(dev, pipe);
1218 int timeout;
1219
1220 /* device pulled? Shortcut the action. */
1221 if (devgone == dev) {
1222 dev->status = USB_ST_CRC_ERR;
1223 return 0;
1224 }
1225
1226#ifdef DEBUG
1227 urb_priv.actual_length = 0;
1228 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1229#else
1230 wait_ms(1);
1231#endif
1232 if (!maxsize) {
1233 err("submit_common_message: pipesize for pipe %lx is zero",
1234 pipe);
1235 return -1;
1236 }
1237
1238 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1239 err("sohci_submit_job failed");
1240 return -1;
1241 }
1242
1243 wait_ms(10);
1244 /* ohci_dump_status(&gohci); */
1245
1246 /* allow more time for a BULK device to react - some are slow */
1247#define BULK_TO 5000 /* timeout in milliseconds */
1248 if (usb_pipetype (pipe) == PIPE_BULK)
1249 timeout = BULK_TO;
1250 else
1251 timeout = 100;
1252
1253 /* wait for it to complete */
1254 for (;;) {
1255 /* check whether the controller is done */
1256 stat = hc_interrupt();
1257 if (stat < 0) {
1258 stat = USB_ST_CRC_ERR;
1259 break;
1260 }
1261 if (stat >= 0 && stat != 0xff) {
1262 /* 0xff is returned for an SF-interrupt */
1263 break;
1264 }
1265 if (--timeout) {
1266 wait_ms(1);
1267 } else {
1268 err("CTL:TIMEOUT ");
1269 stat = USB_ST_CRC_ERR;
1270 break;
1271 }
1272 }
1273 /* we got an Root Hub Status Change interrupt */
1274 if (got_rhsc) {
1275#ifdef DEBUG
1276 ohci_dump_roothub (&gohci, 1);
1277#endif
1278 got_rhsc = 0;
1279 /* abuse timeout */
1280 timeout = rh_check_port_status(&gohci);
1281 if (timeout >= 0) {
1282#if 0 /* this does nothing useful, but leave it here in case that changes */
1283 /* the called routine adds 1 to the passed value */
1284 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1285#endif
1286 /*
1287 * XXX
1288 * This is potentially dangerous because it assumes
1289 * that only one device is ever plugged in!
1290 */
1291 devgone = dev;
1292 }
1293 }
1294
1295 dev->status = stat;
1296 dev->act_len = transfer_len;
1297
1298#ifdef DEBUG
1299 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1300#else
1301 wait_ms(1);
1302#endif
1303
1304 /* free TDs in urb_priv */
1305 urb_free_priv (&urb_priv);
1306 return 0;
1307}
1308
1309/* submit routines called from usb.c */
1310int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1311 int transfer_len)
1312{
1313 info("submit_bulk_msg");
1314 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1315}
1316
1317int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1318 int transfer_len, struct devrequest *setup)
1319{
1320 int maxsize = usb_maxpacket(dev, pipe);
1321
1322 info("submit_control_msg");
1323#ifdef DEBUG
1324 urb_priv.actual_length = 0;
1325 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1326#else
1327 wait_ms(1);
1328#endif
1329 if (!maxsize) {
1330 err("submit_control_message: pipesize for pipe %lx is zero",
1331 pipe);
1332 return -1;
1333 }
1334 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1335 gohci.rh.dev = dev;
1336 /* root hub - redirect */
1337 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1338 setup);
1339 }
1340
1341 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1342}
1343
1344int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1345 int transfer_len, int interval)
1346{
1347 info("submit_int_msg");
1348 return -1;
1349}
1350
1351/*-------------------------------------------------------------------------*
1352 * HC functions
1353 *-------------------------------------------------------------------------*/
1354
1355/* reset the HC and BUS */
1356
1357static int hc_reset (ohci_t *ohci)
1358{
1359 int timeout = 30;
1360 int smm_timeout = 50; /* 0,5 sec */
1361
1362 dbg("%s\n", __FUNCTION__);
1363
1364 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1365 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1366 info("USB HC TakeOver from SMM");
1367 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1368 wait_ms (10);
1369 if (--smm_timeout == 0) {
1370 err("USB HC TakeOver failed!");
1371 return -1;
1372 }
1373 }
1374 }
1375
1376 /* Disable HC interrupts */
1377 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1378
1379 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1380 ohci->slot_name,
1381 readl(&ohci->regs->control));
1382
1383 /* Reset USB (needed by some controllers) */
1384 writel (0, &ohci->regs->control);
1385
1386 /* HC Reset requires max 10 us delay */
1387 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1388 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1389 if (--timeout == 0) {
1390 err("USB HC reset timed out!");
1391 return -1;
1392 }
1393 udelay (1);
1394 }
1395 return 0;
1396}
1397
1398/*-------------------------------------------------------------------------*/
1399
1400/* Start an OHCI controller, set the BUS operational
1401 * enable interrupts
1402 * connect the virtual root hub */
1403
1404static int hc_start (ohci_t * ohci)
1405{
1406 __u32 mask;
1407 unsigned int fminterval;
1408
1409 ohci->disabled = 1;
1410
1411 /* Tell the controller where the control and bulk lists are
1412 * The lists are empty now. */
1413
1414 writel (0, &ohci->regs->ed_controlhead);
1415 writel (0, &ohci->regs->ed_bulkhead);
1416
1417 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1418
1419 fminterval = 0x2edf;
1420 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1421 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1422 writel (fminterval, &ohci->regs->fminterval);
1423 writel (0x628, &ohci->regs->lsthresh);
1424
1425 /* start controller operations */
1426 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1427 ohci->disabled = 0;
1428 writel (ohci->hc_control, &ohci->regs->control);
1429
1430 /* disable all interrupts */
1431 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1432 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1433 OHCI_INTR_OC | OHCI_INTR_MIE);
1434 writel (mask, &ohci->regs->intrdisable);
1435 /* clear all interrupts */
1436 mask &= ~OHCI_INTR_MIE;
1437 writel (mask, &ohci->regs->intrstatus);
1438 /* Choose the interrupts we care about now - but w/o MIE */
1439 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1440 writel (mask, &ohci->regs->intrenable);
1441
1442#ifdef OHCI_USE_NPS
1443 /* required for AMD-756 and some Mac platforms */
1444 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1445 &ohci->regs->roothub.a);
1446 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1447#endif /* OHCI_USE_NPS */
1448
1449#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1450 /* POTPGT delay is bits 24-31, in 2 ms units. */
1451 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1452
1453 /* connect the virtual root hub */
1454 ohci->rh.devnum = 0;
1455
1456 return 0;
1457}
1458
1459/*-------------------------------------------------------------------------*/
1460
1461/* an interrupt happens */
1462
1463static int
1464hc_interrupt (void)
1465{
1466 ohci_t *ohci = &gohci;
1467 struct ohci_regs *regs = ohci->regs;
1468 int ints;
1469 int stat = -1;
1470
1471 if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1472 ints = OHCI_INTR_WDH;
1473 } else {
1474 ints = readl (&regs->intrstatus);
1475 }
1476
1477 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1478
1479 if (ints & OHCI_INTR_RHSC) {
1480 got_rhsc = 1;
1481 }
1482
1483 if (ints & OHCI_INTR_UE) {
1484 ohci->disabled++;
1485 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1486 ohci->slot_name);
1487 /* e.g. due to PCI Master/Target Abort */
1488
1489#ifdef DEBUG
1490 ohci_dump (ohci, 1);
1491#else
1492 wait_ms(1);
1493#endif
1494 /* FIXME: be optimistic, hope that bug won't repeat often. */
1495 /* Make some non-interrupt context restart the controller. */
1496 /* Count and limit the retries though; either hardware or */
1497 /* software errors can go forever... */
1498 hc_reset (ohci);
1499 return -1;
1500 }
1501
1502 if (ints & OHCI_INTR_WDH) {
1503 wait_ms(1);
1504 writel (OHCI_INTR_WDH, &regs->intrdisable);
1505 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1506 writel (OHCI_INTR_WDH, &regs->intrenable);
1507 }
1508
1509 if (ints & OHCI_INTR_SO) {
1510 dbg("USB Schedule overrun\n");
1511 writel (OHCI_INTR_SO, &regs->intrenable);
1512 stat = -1;
1513 }
1514
1515 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1516 if (ints & OHCI_INTR_SF) {
1517 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1518 wait_ms(1);
1519 writel (OHCI_INTR_SF, &regs->intrdisable);
1520 if (ohci->ed_rm_list[frame] != NULL)
1521 writel (OHCI_INTR_SF, &regs->intrenable);
1522 stat = 0xff;
1523 }
1524
1525 writel (ints, &regs->intrstatus);
1526 return stat;
1527}
1528
1529/*-------------------------------------------------------------------------*/
1530
1531/*-------------------------------------------------------------------------*/
1532
1533/* De-allocate all resources.. */
1534
1535static void hc_release_ohci (ohci_t *ohci)
1536{
1537 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1538
1539 if (!ohci->disabled)
1540 hc_reset (ohci);
1541}
1542
1543/*-------------------------------------------------------------------------*/
1544
1545/*
1546 * low level initalisation routine, called from usb.c
1547 */
1548static char ohci_inited = 0;
1549
1550int usb_lowlevel_init(void)
1551{
1552 /*
1553 * Enable USB host clock.
1554 */
1555 *AT91C_PMC_SCER = AT91C_PMC_UHP; /* 48MHz clock enabled for UHP */
1556 *AT91C_PMC_PCER = 1 << AT91C_ID_UHP; /* Peripheral Clock Enable Register */
1557
1558 memset (&gohci, 0, sizeof (ohci_t));
1559 memset (&urb_priv, 0, sizeof (urb_priv_t));
1560
1561 /* align the storage */
1562 if ((__u32)&ghcca[0] & 0xff) {
1563 err("HCCA not aligned!!");
1564 return -1;
1565 }
1566 phcca = &ghcca[0];
1567 info("aligned ghcca %p", phcca);
1568 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1569 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1570 err("EDs not aligned!!");
1571 return -1;
1572 }
1573 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1574 if ((__u32)gtd & 0x7) {
1575 err("TDs not aligned!!");
1576 return -1;
1577 }
1578 ptd = gtd;
1579 gohci.hcca = phcca;
1580 memset (phcca, 0, sizeof (struct ohci_hcca));
1581
1582 gohci.disabled = 1;
1583 gohci.sleeping = 0;
1584 gohci.irq = -1;
1585 gohci.regs = (struct ohci_regs *)AT91_USB_HOST_BASE;
1586
1587 gohci.flags = 0;
1588 gohci.slot_name = "at91rm9200";
1589
1590 if (hc_reset (&gohci) < 0) {
1591 hc_release_ohci (&gohci);
1592 /* Initialization failed */
1593 *AT91C_PMC_PCER = AT91C_ID_UHP;
1594 *AT91C_PMC_SCDR = 1 << AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
1595 return -1;
1596 }
1597
1598 /* FIXME this is a second HC reset; why?? */
1599/* writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1600 wait_ms (10);*/
1601
1602 if (hc_start (&gohci) < 0) {
1603 err ("can't start usb-%s", gohci.slot_name);
1604 hc_release_ohci (&gohci);
1605 /* Initialization failed */
1606 *AT91C_PMC_PCER = AT91C_ID_UHP;
1607 *AT91C_PMC_SCDR = 1 << AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
1608 return -1;
1609 }
1610
1611#ifdef DEBUG
1612 ohci_dump (&gohci, 1);
1613#else
1614 wait_ms(1);
1615#endif
1616 ohci_inited = 1;
1617 return 0;
1618}
1619
1620int usb_lowlevel_stop(void)
1621{
1622 /* this gets called really early - before the controller has */
1623 /* even been initialized! */
1624 if (!ohci_inited)
1625 return 0;
1626 /* TODO release any interrupts, etc. */
1627 /* call hc_release_ohci() here ? */
1628 hc_reset (&gohci);
1629 /* may not want to do this */
1630 *AT91C_PMC_PCER = 1 << AT91C_ID_UHP;
1631 *AT91C_PMC_SCDR = 1 << AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
1632 return 0;
1633}
1634
1635#endif /* CONFIG_USB_OHCI */