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Heiko Schocher2605e902007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocher2605e902007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
16#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
17#define CONFIG_MPC5200 1 /* especially an MPC5200 */
18#define CONFIG_JUPITER 1 /* ... on Jupiter board */
19
Wolfgang Denk2ae18242010-10-06 09:05:45 +020020/*
21 * Valid values for CONFIG_SYS_TEXT_BASE are:
22 * 0xFFF00000 boot high (standard configuration)
23 * 0x00100000 boot from RAM (for testing only)
24 */
25#ifndef CONFIG_SYS_TEXT_BASE
26#define CONFIG_SYS_TEXT_BASE 0xFFF00000
27#endif
28
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020029#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocher2605e902007-02-16 07:57:42 +010030
31#define CONFIG_BOARD_EARLY_INIT_R 1
32#define CONFIG_BOARD_EARLY_INIT_F 1
33
Becky Bruce31d82672008-05-08 19:02:12 -050034#define CONFIG_HIGH_BATS 1 /* High BATs supported */
35
Heiko Schocher2605e902007-02-16 07:57:42 +010036/*
37 * Serial console configuration
38 */
39#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
40#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocher2605e902007-02-16 07:57:42 +010042
43/*
44 * PCI Mapping:
45 * 0x40000000 - 0x4fffffff - PCI Memory
46 * 0x50000000 - 0x50ffffff - PCI IO Space
47 */
Wolfgang Denk769104c2007-03-08 21:49:27 +010048/*#define CONFIG_PCI */
Heiko Schocher2605e902007-02-16 07:57:42 +010049
50#if defined(CONFIG_PCI)
51#define CONFIG_PCI_PNP 1
52#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liewf33fca22008-03-30 01:19:06 -050053#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocher2605e902007-02-16 07:57:42 +010054
55#define CONFIG_PCI_MEM_BUS 0x40000000
56#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
57#define CONFIG_PCI_MEM_SIZE 0x10000000
58
59#define CONFIG_PCI_IO_BUS 0x50000000
60#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
61#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocher2605e902007-02-16 07:57:42 +010062#endif
63
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocher2605e902007-02-16 07:57:42 +010065
Heiko Schocher2605e902007-02-16 07:57:42 +010066#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocher2605e902007-02-16 07:57:42 +010068
69/* Partitions */
70#define CONFIG_MAC_PARTITION
71#define CONFIG_DOS_PARTITION
72#define CONFIG_ISO_PARTITION
73
74#define CONFIG_TIMESTAMP /* Print image info with timestamp */
75
Heiko Schocher2605e902007-02-16 07:57:42 +010076
Jon Loeligerbc234c12007-07-04 22:32:51 -050077/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050078 * BOOTP options
79 */
80#define CONFIG_BOOTP_BOOTFILESIZE
81#define CONFIG_BOOTP_BOOTPATH
82#define CONFIG_BOOTP_GATEWAY
83#define CONFIG_BOOTP_HOSTNAME
84
85
86/*
Jon Loeligerbc234c12007-07-04 22:32:51 -050087 * Command line configuration.
88 */
89#include <config_cmd_default.h>
90
91#define CONFIG_CMD_NFS
92#define CONFIG_CMD_SNTP
93
Jon Loeliger7f5c0152007-07-10 09:38:02 -050094#if defined(CONFIG_PCI)
95#define CODFIG_CMD_PCI
96#endif
97
Heiko Schocher2605e902007-02-16 07:57:42 +010098
99/*
100 * Autobooting
101 */
102#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
103
104#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +0100105 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100106 "echo"
107
108#undef CONFIG_BOOTARGS
109
110#define CONFIG_EXTRA_ENV_SETTINGS \
111 "netdev=eth0\0" \
112 "nfsargs=setenv bootargs root=/dev/nfs rw " \
113 "nfsroot=${serverip}:${rootpath}\0" \
114 "ramargs=setenv bootargs root=/dev/ram rw\0" \
115 "addip=setenv bootargs ${bootargs} " \
116 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
117 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100118 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100119 "bootm ${kernel_addr}\0" \
120 "flash_self=run ramargs addip;" \
121 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100122 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher8502e302007-03-13 09:40:59 +0100123 "${baudrate}\0" \
124 "contyp=ttyS0\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100125 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher8502e302007-03-13 09:40:59 +0100126 "bootm\0" \
127 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100128 "bootfile=/tftpboot/jupiter/uImage\0" \
129 ""
130
131#define CONFIG_BOOTCOMMAND "run flash_self"
132
133/*
134 * IPB Bus clocking configuration.
135 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocher2605e902007-02-16 07:57:42 +0100137
138#if 0
139/* pass open firmware flat tree */
Grant Likelycf2817a2007-09-06 09:46:23 -0600140#define CONFIG_OF_LIBFDT 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100141#define CONFIG_OF_BOARD_SETUP 1
142
Heiko Schocher2605e902007-02-16 07:57:42 +0100143#define OF_CPU "PowerPC,5200@0"
144#define OF_SOC "soc5200@f0000000"
145#define OF_TBCLK (bd->bi_busfreq / 8)
146#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
147#endif
148
149#if 0
150/*
151 * I2C configuration
152 */
153#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Heiko Schocher2605e902007-02-16 07:57:42 +0100155
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
157#define CONFIG_SYS_I2C_SLAVE 0x7F
Heiko Schocher2605e902007-02-16 07:57:42 +0100158
159/*
160 * EEPROM configuration
161 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
163#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
164#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
165#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
Heiko Schocher2605e902007-02-16 07:57:42 +0100166#endif
167
168/*
169 * Flash configuration
170 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_FLASH_BASE 0xFF000000
172#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocher2605e902007-02-16 07:57:42 +0100173
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocher2605e902007-02-16 07:57:42 +0100175
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200176#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocher2605e902007-02-16 07:57:42 +0100177
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
179#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocher2605e902007-02-16 07:57:42 +0100180
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocher2605e902007-02-16 07:57:42 +0100182
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200183#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_FLASH_CFI
185#define CONFIG_SYS_FLASH_EMPTY_INFO
186#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
187#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
188#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100189
190/*
191 * Environment settings
192 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200193#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200194#define CONFIG_ENV_SIZE 0x20000
195#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocher2605e902007-02-16 07:57:42 +0100196#define CONFIG_ENV_OVERWRITE 1
197
Heiko Schocher8502e302007-03-13 09:40:59 +0100198/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200199#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
200#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher8502e302007-03-13 09:40:59 +0100201
Heiko Schocher2605e902007-02-16 07:57:42 +0100202/*
203 * Memory map
204 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#define CONFIG_SYS_MBAR 0xF0000000
206#define CONFIG_SYS_SDRAM_BASE 0x00000000
207#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocher2605e902007-02-16 07:57:42 +0100208
209/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200211#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocher2605e902007-02-16 07:57:42 +0100212
213
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200214#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocher2605e902007-02-16 07:57:42 +0100216
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200217#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
219# define CONFIG_SYS_RAMBOOT 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100220#endif
221
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
223#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
224#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocher2605e902007-02-16 07:57:42 +0100225
226/*
227 * Ethernet configuration
228 */
229#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800230#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocher2605e902007-02-16 07:57:42 +0100231/*
Ben Warren86321fc2009-02-05 23:58:25 -0800232 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocher2605e902007-02-16 07:57:42 +0100233 */
Ben Warren86321fc2009-02-05 23:58:25 -0800234/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocher2605e902007-02-16 07:57:42 +0100235#define CONFIG_PHY_ADDR 0x00
236
237/*
238 * GPIO configuration
239 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocher2605e902007-02-16 07:57:42 +0100241
242/*
243 * Miscellaneous configurable options
244 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200245#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher8502e302007-03-13 09:40:59 +0100246
247#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
Jon Loeligerbc234c12007-07-04 22:32:51 -0500249#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocher2605e902007-02-16 07:57:42 +0100251#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200252#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocher2605e902007-02-16 07:57:42 +0100253#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200254#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
255#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
256#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocher2605e902007-02-16 07:57:42 +0100257
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
259#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
260#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100261
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocher2605e902007-02-16 07:57:42 +0100263
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerbc234c12007-07-04 22:32:51 -0500265#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerbc234c12007-07-04 22:32:51 -0500267#endif
268
Heiko Schocher2605e902007-02-16 07:57:42 +0100269/*
270 * Various low-level settings
271 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200272#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
273#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocher2605e902007-02-16 07:57:42 +0100274
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200275#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
276#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
277#define CONFIG_SYS_BOOTCS_CFG 0x00047801
278#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
279#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocher2605e902007-02-16 07:57:42 +0100280
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281#define CONFIG_SYS_CS_BURST 0x00000000
282#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocher2605e902007-02-16 07:57:42 +0100283
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocher2605e902007-02-16 07:57:42 +0100285
286#endif /* __CONFIG_H */