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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk507bbe32004-04-18 21:13:41 +00002/*
Michal Simekcfc67112007-03-11 13:48:24 +01003 * (C) Copyright 2007 Michal Simek
wdenk507bbe32004-04-18 21:13:41 +00004 * (C) Copyright 2004 Atmark Techno, Inc.
5 *
Michal Simekcfc67112007-03-11 13:48:24 +01006 * Michal SIMEK <monstr@monstr.eu>
wdenk507bbe32004-04-18 21:13:41 +00007 * Yasushi SHOJI <yashi@atmark-techno.com>
wdenk507bbe32004-04-18 21:13:41 +00008 */
9
Michal Simekcfc67112007-03-11 13:48:24 +010010#include <common.h>
11#include <command.h>
Michal Simek9aa65ca2016-02-15 12:10:32 +010012#include <fdtdec.h>
Simon Glassc30b7ad2019-11-14 12:57:41 -070013#include <irq_func.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060014#include <log.h>
Michal Simek575a3d22012-07-10 10:31:31 +020015#include <malloc.h>
Simon Glass401d1c42020-10-30 21:38:53 -060016#include <asm/global_data.h>
Michal Simekcfc67112007-03-11 13:48:24 +010017#include <asm/microblaze_intc.h>
Michal Simek42efed62007-05-07 17:22:25 +020018#include <asm/asm.h>
Michal Simekcfc67112007-03-11 13:48:24 +010019
Michal Simek9aa65ca2016-02-15 12:10:32 +010020DECLARE_GLOBAL_DATA_PTR;
21
Michal Simek26e6da82012-06-29 13:27:28 +020022void enable_interrupts(void)
wdenk507bbe32004-04-18 21:13:41 +000023{
Michal Simek070b8e02015-01-26 15:25:32 +010024 debug("Enable interrupts for the whole CPU\n");
Michal Simekfb05f6d2007-05-07 23:58:31 +020025 MSRSET(0x2);
wdenk507bbe32004-04-18 21:13:41 +000026}
27
Michal Simek26e6da82012-06-29 13:27:28 +020028int disable_interrupts(void)
wdenk507bbe32004-04-18 21:13:41 +000029{
Michal Simek68e99e52010-12-21 08:30:39 +010030 unsigned int msr;
31
32 MFS(msr, rmsr);
Michal Simekfb05f6d2007-05-07 23:58:31 +020033 MSRCLR(0x2);
Michal Simek68e99e52010-12-21 08:30:39 +010034 return (msr & 0x2) != 0;
wdenk507bbe32004-04-18 21:13:41 +000035}
Michal Simekcfc67112007-03-11 13:48:24 +010036
Michal Simek575a3d22012-07-10 10:31:31 +020037static struct irq_action *vecs;
38static u32 irq_no;
Michal Simekcfc67112007-03-11 13:48:24 +010039
40/* mapping structure to interrupt controller */
Michal Simek575a3d22012-07-10 10:31:31 +020041microblaze_intc_t *intc;
Michal Simekcfc67112007-03-11 13:48:24 +010042
43/* default handler */
Michal Simek575a3d22012-07-10 10:31:31 +020044static void def_hdlr(void)
Michal Simekcfc67112007-03-11 13:48:24 +010045{
Michal Simek26e6da82012-06-29 13:27:28 +020046 puts("def_hdlr\n");
Michal Simekcfc67112007-03-11 13:48:24 +010047}
48
Michal Simek575a3d22012-07-10 10:31:31 +020049static void enable_one_interrupt(int irq)
Michal Simekcfc67112007-03-11 13:48:24 +010050{
51 int mask;
52 int offset = 1;
Michal Simek26e6da82012-06-29 13:27:28 +020053
Michal Simekcfc67112007-03-11 13:48:24 +010054 offset <<= irq;
55 mask = intc->ier;
56 intc->ier = (mask | offset);
Michal Simek4c0922f2015-01-26 14:37:52 +010057
58 debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
59 intc->ier);
60 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
61 intc->iar, intc->mer);
Michal Simekcfc67112007-03-11 13:48:24 +010062}
63
Michal Simek575a3d22012-07-10 10:31:31 +020064static void disable_one_interrupt(int irq)
Michal Simekcfc67112007-03-11 13:48:24 +010065{
66 int mask;
67 int offset = 1;
Michal Simek26e6da82012-06-29 13:27:28 +020068
Michal Simekcfc67112007-03-11 13:48:24 +010069 offset <<= irq;
70 mask = intc->ier;
71 intc->ier = (mask & ~offset);
Michal Simek4c0922f2015-01-26 14:37:52 +010072
73 debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
74 intc->ier);
75 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
76 intc->iar, intc->mer);
Michal Simekcfc67112007-03-11 13:48:24 +010077}
78
Michal Simek87069082012-06-29 14:21:52 +020079int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
Michal Simekcfc67112007-03-11 13:48:24 +010080{
81 struct irq_action *act;
Michal Simek26e6da82012-06-29 13:27:28 +020082
Michal Simekcfc67112007-03-11 13:48:24 +010083 /* irq out of range */
Michal Simek575a3d22012-07-10 10:31:31 +020084 if ((irq < 0) || (irq > irq_no)) {
Michal Simek26e6da82012-06-29 13:27:28 +020085 puts("IRQ out of range\n");
Michal Simek87069082012-06-29 14:21:52 +020086 return -1;
Michal Simekcfc67112007-03-11 13:48:24 +010087 }
88 act = &vecs[irq];
89 if (hdlr) { /* enable */
90 act->handler = hdlr;
91 act->arg = arg;
92 act->count = 0;
Michal Simeke217b0d2015-01-26 14:39:22 +010093 enable_one_interrupt(irq);
Michal Simek87069082012-06-29 14:21:52 +020094 return 0;
Michal Simekcfc67112007-03-11 13:48:24 +010095 }
Michal Simek87069082012-06-29 14:21:52 +020096
97 /* Disable */
Michal Simeke217b0d2015-01-26 14:39:22 +010098 act->handler = (interrupt_handler_t *)def_hdlr;
Michal Simek87069082012-06-29 14:21:52 +020099 act->arg = (void *)irq;
100 disable_one_interrupt(irq);
101 return 1;
Michal Simekcfc67112007-03-11 13:48:24 +0100102}
103
104/* initialization interrupt controller - hardware */
Michal Simek575a3d22012-07-10 10:31:31 +0200105static void intc_init(void)
Michal Simekcfc67112007-03-11 13:48:24 +0100106{
107 intc->mer = 0;
108 intc->ier = 0;
109 intc->iar = 0xFFFFFFFF;
110 /* XIntc_Start - hw_interrupt enable and all interrupt enable */
111 intc->mer = 0x3;
Michal Simek4c0922f2015-01-26 14:37:52 +0100112
113 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
114 intc->iar, intc->mer);
Michal Simekcfc67112007-03-11 13:48:24 +0100115}
116
Michal Simek2c7c32f2015-01-27 12:44:12 +0100117int interrupt_init(void)
Michal Simekcfc67112007-03-11 13:48:24 +0100118{
119 int i;
Michal Simek9aa65ca2016-02-15 12:10:32 +0100120 const void *blob = gd->fdt_blob;
121 int node = 0;
122
123 debug("INTC: Initialization\n");
124
125 node = fdt_node_offset_by_compatible(blob, node,
126 "xlnx,xps-intc-1.00.a");
127 if (node != -1) {
128 fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
129 if (base == FDT_ADDR_T_NONE)
130 return -1;
131
132 debug("INTC: Base addr %lx\n", base);
133 intc = (microblaze_intc_t *)base;
134 irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
135 debug("INTC: IRQ NO %x\n", irq_no);
136 } else {
137 return node;
138 }
Michal Simeka359eaa2016-02-15 13:44:19 +0100139
Michal Simek575a3d22012-07-10 10:31:31 +0200140 if (irq_no) {
141 vecs = calloc(1, sizeof(struct irq_action) * irq_no);
142 if (vecs == NULL) {
143 puts("Interrupt vector allocation failed\n");
144 return -1;
145 }
146
147 /* initialize irq list */
148 for (i = 0; i < irq_no; i++) {
Michal Simeke217b0d2015-01-26 14:39:22 +0100149 vecs[i].handler = (interrupt_handler_t *)def_hdlr;
Michal Simek575a3d22012-07-10 10:31:31 +0200150 vecs[i].arg = (void *)i;
151 vecs[i].count = 0;
152 }
153 /* initialize intc controller */
154 intc_init();
155 enable_interrupts();
156 } else {
157 puts("Undefined interrupt controller\n");
Michal Simekcfc67112007-03-11 13:48:24 +0100158 }
Michal Simekcfc67112007-03-11 13:48:24 +0100159 return 0;
160}
161
Michal Simek26e6da82012-06-29 13:27:28 +0200162void interrupt_handler(void)
Michal Simekcfc67112007-03-11 13:48:24 +0100163{
Michal Simek8125c982010-04-16 11:51:59 +0200164 int irqs = intc->ivr; /* find active interrupt */
165 int mask = 1;
Michal Simek42efed62007-05-07 17:22:25 +0200166 int value;
Michal Simek8125c982010-04-16 11:51:59 +0200167 struct irq_action *act = vecs + irqs;
168
Michal Simek4c0922f2015-01-26 14:37:52 +0100169 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
170 intc->iar, intc->mer);
171#ifdef DEBUG
172 R14(value);
Michal Simekcfc67112007-03-11 13:48:24 +0100173#endif
Michal Simek4c0922f2015-01-26 14:37:52 +0100174 debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
175
176 debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
177 (u32)act->handler, act->count, (u32)act->arg);
Michal Simeke217b0d2015-01-26 14:39:22 +0100178 act->handler(act->arg);
Michal Simek8125c982010-04-16 11:51:59 +0200179 act->count++;
Michal Simek42efed62007-05-07 17:22:25 +0200180
Stephan Linz0f883262012-02-22 19:12:43 +0100181 intc->iar = mask << irqs;
182
Michal Simek4c0922f2015-01-26 14:37:52 +0100183 debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
184 intc->ier, intc->iar, intc->mer);
185#ifdef DEBUG
Michal Simek42efed62007-05-07 17:22:25 +0200186 R14(value);
Michal Simekcfc67112007-03-11 13:48:24 +0100187#endif
Michal Simek4c0922f2015-01-26 14:37:52 +0100188 debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
Michal Simekcfc67112007-03-11 13:48:24 +0100189}
Michal Simekcfc67112007-03-11 13:48:24 +0100190
Jon Loeliger44312832007-07-09 19:06:00 -0500191#if defined(CONFIG_CMD_IRQ)
Simon Glass09140112020-05-10 11:40:03 -0600192int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[])
Michal Simekcfc67112007-03-11 13:48:24 +0100193{
194 int i;
195 struct irq_action *act = vecs;
196
Michal Simek575a3d22012-07-10 10:31:31 +0200197 if (irq_no) {
198 puts("\nInterrupt-Information:\n\n"
199 "Nr Routine Arg Count\n"
200 "-----------------------------\n");
Michal Simekcfc67112007-03-11 13:48:24 +0100201
Michal Simek575a3d22012-07-10 10:31:31 +0200202 for (i = 0; i < irq_no; i++) {
Michal Simeke217b0d2015-01-26 14:39:22 +0100203 if (act->handler != (interrupt_handler_t *)def_hdlr) {
Michal Simek575a3d22012-07-10 10:31:31 +0200204 printf("%02d %08x %08x %d\n", i,
Michal Simeke217b0d2015-01-26 14:39:22 +0100205 (int)act->handler, (int)act->arg,
206 act->count);
Michal Simek575a3d22012-07-10 10:31:31 +0200207 }
208 act++;
Michal Simekcfc67112007-03-11 13:48:24 +0100209 }
Michal Simek575a3d22012-07-10 10:31:31 +0200210 puts("\n");
211 } else {
212 puts("Undefined interrupt controller\n");
Michal Simekcfc67112007-03-11 13:48:24 +0100213 }
Michal Simek575a3d22012-07-10 10:31:31 +0200214 return 0;
Michal Simekcfc67112007-03-11 13:48:24 +0100215}
Jon Loeliger44312832007-07-09 19:06:00 -0500216#endif