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Masahiro Yamadac2da86f2017-04-14 11:10:22 +09001/*
2 * Copyright (c) 2015, Linaro Limited
3 *
Masahiro Yamadac54bcf62017-04-14 11:10:23 +09004 * SPDX-License-Identifier: GPL-2.0
Masahiro Yamadac2da86f2017-04-14 11:10:22 +09005 */
6#ifndef __LINUX_ARM_SMCCC_H
7#define __LINUX_ARM_SMCCC_H
8
9/*
10 * This file provides common defines for ARM SMC Calling Convention as
11 * specified in
12 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
13 */
14
15#define ARM_SMCCC_STD_CALL 0
16#define ARM_SMCCC_FAST_CALL 1
17#define ARM_SMCCC_TYPE_SHIFT 31
18
19#define ARM_SMCCC_SMC_32 0
20#define ARM_SMCCC_SMC_64 1
21#define ARM_SMCCC_CALL_CONV_SHIFT 30
22
23#define ARM_SMCCC_OWNER_MASK 0x3F
24#define ARM_SMCCC_OWNER_SHIFT 24
25
26#define ARM_SMCCC_FUNC_MASK 0xFFFF
27
28#define ARM_SMCCC_IS_FAST_CALL(smc_val) \
29 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
30#define ARM_SMCCC_IS_64(smc_val) \
31 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
32#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
33#define ARM_SMCCC_OWNER_NUM(smc_val) \
34 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
35
36#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
37 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
38 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
39 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
40 ((func_num) & ARM_SMCCC_FUNC_MASK))
41
42#define ARM_SMCCC_OWNER_ARCH 0
43#define ARM_SMCCC_OWNER_CPU 1
44#define ARM_SMCCC_OWNER_SIP 2
45#define ARM_SMCCC_OWNER_OEM 3
46#define ARM_SMCCC_OWNER_STANDARD 4
47#define ARM_SMCCC_OWNER_TRUSTED_APP 48
48#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
49#define ARM_SMCCC_OWNER_TRUSTED_OS 50
50#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
51
52#define ARM_SMCCC_QUIRK_NONE 0
53#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
54
55#ifndef __ASSEMBLY__
56
57#include <linux/linkage.h>
58#include <linux/types.h>
59/**
60 * struct arm_smccc_res - Result from SMC/HVC call
61 * @a0-a3 result values from registers 0 to 3
62 */
63struct arm_smccc_res {
64 unsigned long a0;
65 unsigned long a1;
66 unsigned long a2;
67 unsigned long a3;
68};
69
70/**
71 * struct arm_smccc_quirk - Contains quirk information
72 * @id: quirk identification
73 * @state: quirk specific information
74 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
75 */
76struct arm_smccc_quirk {
77 int id;
78 union {
79 unsigned long a6;
80 } state;
81};
82
83/**
84 * __arm_smccc_smc() - make SMC calls
85 * @a0-a7: arguments passed in registers 0 to 7
86 * @res: result values from registers 0 to 3
87 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
88 *
89 * This function is used to make SMC calls following SMC Calling Convention.
90 * The content of the supplied param are copied to registers 0 to 7 prior
91 * to the SMC instruction. The return values are updated with the content
92 * from register 0 to 3 on return from the SMC instruction. An optional
93 * quirk structure provides vendor specific behavior.
94 */
95asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
96 unsigned long a2, unsigned long a3, unsigned long a4,
97 unsigned long a5, unsigned long a6, unsigned long a7,
98 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
99
100/**
101 * __arm_smccc_hvc() - make HVC calls
102 * @a0-a7: arguments passed in registers 0 to 7
103 * @res: result values from registers 0 to 3
104 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
105 *
106 * This function is used to make HVC calls following SMC Calling
107 * Convention. The content of the supplied param are copied to registers 0
108 * to 7 prior to the HVC instruction. The return values are updated with
109 * the content from register 0 to 3 on return from the HVC instruction. An
110 * optional quirk structure provides vendor specific behavior.
111 */
112asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
113 unsigned long a2, unsigned long a3, unsigned long a4,
114 unsigned long a5, unsigned long a6, unsigned long a7,
115 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
116
117#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
118
119#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
120
121#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
122
123#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
124
125#endif /*__ASSEMBLY__*/
126#endif /*__LINUX_ARM_SMCCC_H*/