Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 8 | #include <dt-bindings/interrupt-router/intel-irq.h> |
| 9 | |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 10 | /include/ "skeleton.dtsi" |
| 11 | /include/ "serial.dtsi" |
Bin Meng | b6ff6ce | 2015-11-12 05:33:06 -0800 | [diff] [blame] | 12 | /include/ "keyboard.dtsi" |
Bin Meng | b37b7b2 | 2018-07-19 03:07:33 -0700 | [diff] [blame] | 13 | /include/ "reset.dtsi" |
Bin Meng | 93f8a31 | 2015-07-15 16:23:39 +0800 | [diff] [blame] | 14 | /include/ "rtc.dtsi" |
Bin Meng | 80af398 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 15 | /include/ "tsc_timer.dtsi" |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 16 | |
Simon Glass | 839d66c | 2020-11-05 06:32:17 -0700 | [diff] [blame] | 17 | #include "smbios.dtsi" |
| 18 | |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 19 | / { |
Bin Meng | 683b09d | 2015-06-03 09:20:04 +0800 | [diff] [blame] | 20 | model = "QEMU x86 (I440FX)"; |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 21 | compatible = "qemu,x86"; |
| 22 | |
| 23 | config { |
| 24 | silent_console = <0>; |
| 25 | }; |
| 26 | |
| 27 | chosen { |
| 28 | stdout-path = "/serial"; |
| 29 | }; |
| 30 | |
Bin Meng | a8ebf28 | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 31 | cpus { |
| 32 | #address-cells = <1>; |
| 33 | #size-cells = <0>; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 34 | u-boot,dm-pre-reloc; |
Bin Meng | a8ebf28 | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 35 | |
| 36 | cpu@0 { |
| 37 | device_type = "cpu"; |
Miao Yan | 5a69405 | 2016-01-07 01:32:01 -0800 | [diff] [blame] | 38 | compatible = "cpu-qemu"; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 39 | u-boot,dm-pre-reloc; |
Bin Meng | a8ebf28 | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 40 | reg = <0>; |
| 41 | intel,apic-id = <0>; |
| 42 | }; |
| 43 | }; |
| 44 | |
Bin Meng | 80af398 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 45 | tsc-timer { |
| 46 | clock-frequency = <1000000000>; |
| 47 | }; |
| 48 | |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 49 | pci { |
| 50 | compatible = "pci-x86"; |
| 51 | #address-cells = <3>; |
| 52 | #size-cells = <2>; |
| 53 | u-boot,dm-pre-reloc; |
| 54 | ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 |
| 55 | 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 |
| 56 | 0x01000000 0x0 0x2000 0x2000 0 0xe000>; |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 57 | |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 58 | pch@1,0 { |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 59 | reg = <0x00000800 0 0 0 0>; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 60 | compatible = "intel,pch7"; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 61 | u-boot,dm-pre-reloc; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 62 | |
| 63 | irq-router { |
| 64 | compatible = "intel,irq-router"; |
Bin Meng | 2cffd90 | 2017-01-18 03:32:57 -0800 | [diff] [blame] | 65 | u-boot,dm-pre-reloc; |
Simon Glass | f2b85ab | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 66 | intel,pirq-config = "pci"; |
| 67 | intel,pirq-link = <0x60 4>; |
| 68 | intel,pirq-mask = <0x0e40>; |
| 69 | intel,pirq-routing = < |
| 70 | /* PIIX UHCI */ |
| 71 | PCI_BDF(0, 1, 2) INTD PIRQD |
| 72 | /* e1000 NIC */ |
| 73 | PCI_BDF(0, 3, 0) INTA PIRQC |
| 74 | >; |
| 75 | }; |
Bin Meng | 5c56422 | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 76 | }; |
Bin Meng | a65b25d | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | }; |