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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 2ae43a26405498fcaaec2132db82a2487ad6747b / . / configs / ve8313_defconfig
blob: 08597ab43420124118085229b81022c002d348e6 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0xFE000000
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x4000
4CONFIG_ENV_SECT_SIZE=0x20000
Mario Sixff3bb0c2019-01-21 09:17:53 +0100[diff] [blame]5CONFIG_SYS_CLK_FREQ=32000000
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]6CONFIG_MPC83xx=y
Mario Six93de2532019-01-21 09:17:56 +0100[diff] [blame]7CONFIG_HIGH_BATS=y
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]8CONFIG_TARGET_VE8313=y
Mario Six21c15022019-01-21 09:17:54 +0100[diff] [blame]9CONFIG_SYSTEM_PLL_FACTOR_4_1=y
10CONFIG_CORE_PLL_RATIO_25_1=y
11CONFIG_PCI_HOST_MODE_ENABLE=y
12CONFIG_PCI_INT_ARBITER1_ENABLE=y
13CONFIG_BOOT_MEMORY_SPACE_LOW=y
14CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
15CONFIG_LALE_TIMING_EARLIER=y
Mario Six30915ab2019-01-21 09:17:57 +0100[diff] [blame]16CONFIG_BAT0=y
17CONFIG_BAT0_NAME="SDRAM"
18CONFIG_BAT0_BASE=0x00000000
19CONFIG_BAT0_LENGTH_256_MBYTES=y
20CONFIG_BAT0_ACCESS_RW=y
21CONFIG_BAT0_USER_MODE_VALID=y
22CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
23CONFIG_BAT1=y
24CONFIG_BAT1_NAME="PCI_MEM"
25CONFIG_BAT1_BASE=0x80000000
26CONFIG_BAT1_LENGTH_256_MBYTES=y
27CONFIG_BAT1_ACCESS_RW=y
28CONFIG_BAT1_USER_MODE_VALID=y
29CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
30CONFIG_BAT2=y
31CONFIG_BAT2_NAME="PCI_MMIO"
32CONFIG_BAT2_BASE=0x90000000
33CONFIG_BAT2_LENGTH_256_MBYTES=y
34CONFIG_BAT2_ACCESS_RW=y
35CONFIG_BAT2_ICACHE_INHIBITED=y
36CONFIG_BAT2_ICACHE_GUARDED=y
37CONFIG_BAT2_DCACHE_INHIBITED=y
38CONFIG_BAT2_DCACHE_GUARDED=y
39CONFIG_BAT2_USER_MODE_VALID=y
40CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
41CONFIG_BAT5=y
42CONFIG_BAT5_NAME="IMMR_PCIIO_BCSR"
43CONFIG_BAT5_BASE=0xE0000000
44CONFIG_BAT5_LENGTH_256_MBYTES=y
45CONFIG_BAT5_ACCESS_RW=y
46CONFIG_BAT5_ICACHE_INHIBITED=y
47CONFIG_BAT5_ICACHE_GUARDED=y
48CONFIG_BAT5_DCACHE_INHIBITED=y
49CONFIG_BAT5_DCACHE_GUARDED=y
50CONFIG_BAT5_USER_MODE_VALID=y
51CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
52CONFIG_BAT6=y
53CONFIG_BAT6_NAME="INITRAM_FLASH"
54CONFIG_BAT6_BASE=0xF0000000
55CONFIG_BAT6_LENGTH_256_MBYTES=y
56CONFIG_BAT6_ACCESS_RW=y
57CONFIG_BAT6_ICACHE_GUARDED=y
58CONFIG_BAT6_DCACHE_GUARDED=y
59CONFIG_BAT6_USER_MODE_VALID=y
60CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
61CONFIG_BAT7=y
62CONFIG_BAT7_NAME="FPGA_SRAM_NAND"
63CONFIG_BAT7_BASE=0x60000000
64CONFIG_BAT7_LENGTH_256_MBYTES=y
65CONFIG_BAT7_ACCESS_RW=y
66CONFIG_BAT7_ICACHE_GUARDED=y
67CONFIG_BAT7_DCACHE_GUARDED=y
68CONFIG_BAT7_USER_MODE_VALID=y
69CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
Mario Six9c5df7a2019-01-21 09:17:58 +0100[diff] [blame]70CONFIG_NAND_LBLAWBAR_PRELIM_1=y
71CONFIG_LBLAW0=y
72CONFIG_LBLAW0_BASE=0xFE000000
73CONFIG_LBLAW0_NAME="FLASH"
74CONFIG_LBLAW0_LENGTH_32_MBYTES=y
75CONFIG_LBLAW1=y
76CONFIG_LBLAW1_BASE=0x61000000
77CONFIG_LBLAW1_NAME="NAND"
78CONFIG_LBLAW1_LENGTH_32_KBYTES=y
Tom Rini344a0e42019-05-26 14:45:25 -0400[diff] [blame]79CONFIG_ELBC_BR0_OR0=y
80CONFIG_BR0_OR0_NAME="FLASH"
81CONFIG_BR0_OR0_BASE=0xFE000000
82CONFIG_BR0_PORTSIZE_16BIT=y
83CONFIG_OR0_AM_32_MBYTES=y
84CONFIG_OR0_SCY_5=y
85CONFIG_OR0_CSNT_EARLIER=y
86CONFIG_OR0_ACS_QUARTER_CYCLE_EARLIER=y
87CONFIG_OR0_TRLX_RELAXED=y
88CONFIG_OR0_EAD_EXTRA=y
89CONFIG_ELBC_BR1_OR1=y
90CONFIG_BR1_OR1_NAME="NAND"
91CONFIG_BR1_OR1_BASE=0x61000000
92CONFIG_BR1_ERRORCHECKING_BOTH=y
93CONFIG_BR1_MACHINE_FCM=y
94CONFIG_OR1_BCTLD_NOT_ASSERTED=y
95CONFIG_OR1_SCY_2=y
96CONFIG_OR1_CHT_TWO_CLOCK=y
97CONFIG_OR1_RST_ONE_CLOCK=y
98CONFIG_OR1_TRLX_RELAXED=y
99CONFIG_ELBC_BR2_OR2=y
100CONFIG_BR2_OR2_NAME="NVRAM"
101CONFIG_BR2_OR2_BASE=0x60000000
102CONFIG_OR2_AM_128_KBYTES=y
103CONFIG_OR2_SCY_3=y
104CONFIG_OR2_CSNT_EARLIER=y
105CONFIG_OR2_XACS_EXTENDED=y
106CONFIG_OR2_TRLX_RELAXED=y
107CONFIG_OR2_EHTR_8_CYCLE=y
108CONFIG_OR2_EAD_EXTRA=y
109CONFIG_ELBC_BR3_OR3=y
110CONFIG_BR3_OR3_NAME="SRAM"
111CONFIG_BR3_OR3_BASE=0x62000000
112CONFIG_BR3_PORTSIZE_16BIT=y
113CONFIG_OR3_AM_32_MBYTES=y
114CONFIG_OR3_SCY_15=y
115CONFIG_OR3_CSNT_EARLIER=y
116CONFIG_OR3_XACS_EXTENDED=y
117CONFIG_OR3_TRLX_RELAXED=y
118CONFIG_OR3_EHTR_8_CYCLE=y
119CONFIG_OR3_EAD_EXTRA=y
Mario Sixbe5abb02019-01-21 09:18:09 +0100[diff] [blame]120CONFIG_HID0_FINAL_EMCP=y
121CONFIG_HID0_FINAL_ICE=y
122CONFIG_HID2_HBE=y
Mario Six73df96a2019-01-21 09:18:12 +0100[diff] [blame]123CONFIG_ACR_PIPE_DEP_4=y
124CONFIG_ACR_RPTCNT_4=y
Tom Rini344a0e42019-05-26 14:45:25 -0400[diff] [blame]125CONFIG_LCRR_EADC_3=y
126CONFIG_LCRR_CLKDIV_2=y
Simon Glass73223f02016-02-22 22:55:43 -0700[diff] [blame]127CONFIG_OF_BOARD_SETUP=y
128CONFIG_OF_STDOUT_VIA_ALIAS=y
Heiko Schocherbb597c02016-06-07 08:31:14 +0200[diff] [blame]129CONFIG_BOOTDELAY=6
Simon Glassa5d67542017-01-23 13:31:20 -0700[diff] [blame]130CONFIG_BOARD_EARLY_INIT_F=y
Tom Riniadad96e2016-04-21 21:37:19 -0400[diff] [blame]131CONFIG_HUSH_PARSER=y
Tuomas Tynkkynenad12dc12017-10-08 21:48:01 +0300[diff] [blame]132CONFIG_CMD_IMLS=y
Tom Rini8f1a80e2017-07-28 21:31:42 -0400[diff] [blame]133CONFIG_CMD_NAND=y
Simon Glass6500ec72017-08-04 16:34:34 -0600[diff] [blame]134CONFIG_CMD_PCI=y
Joe Hershbergeref0f2f52015-06-22 16:15:30 -0500[diff] [blame]135# CONFIG_CMD_SETEXPR is not set
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]136CONFIG_CMD_DHCP=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]137CONFIG_CMD_MII=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]138CONFIG_CMD_PING=y
Tom Rinicb6617a2019-11-10 11:28:03 -0500[diff] [blame]139CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]140CONFIG_ENV_ADDR=0xFE060000
141CONFIG_ENV_ADDR_REDUND=0xFE080000
Tom Rini8728c972017-03-13 13:48:42 -0400[diff] [blame]142# CONFIG_MMC is not set
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900[diff] [blame]143CONFIG_MTD_NOR_FLASH=y
Adam Ford2fe88d42018-10-14 15:10:50 -0500[diff] [blame]144CONFIG_FLASH_CFI_DRIVER=y
145CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
146CONFIG_SYS_FLASH_CFI=y
Mario Sixa8ca5c82018-04-27 14:52:21 +0200[diff] [blame]147CONFIG_PHY_MARVELL=y
Mario Six17151052018-03-28 14:38:18 +0200[diff] [blame]148CONFIG_TSEC_ENET=y
Thomas Chou9e390032015-11-19 21:48:14 +0800[diff] [blame]149CONFIG_SYS_NS16550=y
Simon Glass69e173e2016-02-22 22:55:42 -0700[diff] [blame]150CONFIG_OF_LIBFDT=y