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Lokesh Vutlaa7551cf2020-08-05 22:44:28 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/ {
7 chosen {
8 stdout-path = "serial2:115200n8";
9 tick-timer = &timer1;
10 };
11
Vignesh Raghavendradb6451e2020-08-07 00:27:01 +053012 aliases {
13 ethernet0 = &cpsw_port1;
Lokesh Vutla6239cc82021-02-01 11:26:41 +053014 i2c0 = &wkup_i2c0;
15 i2c1 = &mcu_i2c0;
16 i2c2 = &mcu_i2c1;
17 i2c3 = &main_i2c0;
Vignesh Raghavendradb6451e2020-08-07 00:27:01 +053018 };
Lokesh Vutlaa7551cf2020-08-05 22:44:28 +053019};
20
Lokesh Vutlaa7551cf2020-08-05 22:44:28 +053021&cbass_main {
22 u-boot,dm-spl;
23};
24
25&main_navss {
26 u-boot,dm-spl;
27};
28
29&cbass_mcu_wakeup {
30 u-boot,dm-spl;
31
32 timer1: timer@40400000 {
33 compatible = "ti,omap5430-timer";
34 reg = <0x0 0x40400000 0x0 0x80>;
35 ti,timer-alwon;
Tero Kristobb318d82021-06-11 11:45:27 +030036 clock-frequency = <250000000>;
Lokesh Vutlaa7551cf2020-08-05 22:44:28 +053037 u-boot,dm-spl;
38 };
Lokesh Vutla6239cc82021-02-01 11:26:41 +053039
40 chipid@43000014 {
41 u-boot,dm-spl;
42 };
Vignesh Raghavendra2af181b2021-06-07 19:47:51 +053043
44 mcu-navss{
45 u-boot,dm-spl;
46
47 ringacc@2b800000 {
48 reg = <0x0 0x2b800000 0x0 0x400000>,
49 <0x0 0x2b000000 0x0 0x400000>,
50 <0x0 0x28590000 0x0 0x100>,
51 <0x0 0x2a500000 0x0 0x40000>,
52 <0x0 0x28440000 0x0 0x40000>;
53 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
54 u-boot,dm-spl;
55 };
56
57 dma-controller@285c0000 {
58 reg = <0x0 0x285c0000 0x0 0x100>,
59 <0x0 0x284c0000 0x0 0x4000>,
60 <0x0 0x2a800000 0x0 0x40000>,
61 <0x0 0x284a0000 0x0 0x4000>,
62 <0x0 0x2aa00000 0x0 0x40000>,
63 <0x0 0x28400000 0x0 0x2000>;
64 reg-names = "gcfg", "rchan", "rchanrt", "tchan",
65 "tchanrt", "rflow";
66 u-boot,dm-spl;
67 };
68 };
Lokesh Vutlaa7551cf2020-08-05 22:44:28 +053069};
70
71&secure_proxy_main {
72 u-boot,dm-spl;
73};
74
75&dmsc {
76 u-boot,dm-spl;
77 k3_sysreset: sysreset-controller {
78 compatible = "ti,sci-sysreset";
79 u-boot,dm-spl;
80 };
81};
82
83&k3_pds {
84 u-boot,dm-spl;
85};
86
87&k3_clks {
88 u-boot,dm-spl;
89};
90
91&k3_reset {
92 u-boot,dm-spl;
93};
94
95&wkup_pmx0 {
96 u-boot,dm-spl;
97};
98
99&main_pmx0 {
100 u-boot,dm-spl;
101};
102
103&main_uart0 {
104 u-boot,dm-spl;
105};
106
107&mcu_uart0 {
108 u-boot,dm-spl;
109};
110
111&main_sdhci0 {
112 u-boot,dm-spl;
113};
114
115&main_sdhci1 {
116 u-boot,dm-spl;
117};
118
119&wkup_i2c0_pins_default {
120 u-boot,dm-spl;
121};
122
123&wkup_i2c0 {
124 u-boot,dm-spl;
125};
126
127&main_i2c0 {
128 u-boot,dm-spl;
129};
130
131&main_i2c0_pins_default {
132 u-boot,dm-spl;
133};
134
135&exp2 {
136 u-boot,dm-spl;
137};
Vignesh Raghavendra86c9bd42020-08-07 00:26:56 +0530138
Vignesh Raghavendradb6451e2020-08-07 00:27:01 +0530139&mcu_cpsw {
140 reg = <0x0 0x46000000 0x0 0x200000>,
141 <0x0 0x40f00200 0x0 0x8>;
142 reg-names = "cpsw_nuss", "mac_efuse";
Vignesh Raghavendra1e8f2462021-02-09 13:38:48 +0530143 /delete-property/ ranges;
Vignesh Raghavendradb6451e2020-08-07 00:27:01 +0530144
145 cpsw-phy-sel@40f04040 {
146 compatible = "ti,am654-cpsw-phy-sel";
147 reg= <0x0 0x40f04040 0x0 0x4>;
148 reg-names = "gmii-sel";
149 };
150};
151
Vignesh Raghavendra86c9bd42020-08-07 00:26:56 +0530152&main_usbss0_pins_default {
153 u-boot,dm-spl;
154};
155
156&usbss0 {
157 u-boot,dm-spl;
158 ti,usb2-only;
159};
160
161&usb0 {
162 dr_mode = "peripheral";
163 u-boot,dm-spl;
164};
Vignesh Raghavendrac07d0682020-08-13 14:56:17 +0530165
166&wkup_gpio_pins_default {
167 u-boot,dm-spl;
168};
169
Vignesh Raghavendrac07d0682020-08-13 14:56:17 +0530170&mcu_fss0_hpb0_pins_default {
171 u-boot,dm-spl;
172};
173
174&fss {
175 u-boot,dm-spl;
176};
177
178&hbmc {
179 u-boot,dm-spl;
180
181 flash@0,0 {
182 u-boot,dm-spl;
183 };
184};
185
186&hbmc_mux {
187 u-boot,dm-spl;
188};