Jim Liu | 9ca71c9 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com |
| 3 | |
| 4 | #include <dt-bindings/clock/nuvoton,npcm845-clk.h> |
| 5 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 6 | #include <dt-bindings/interrupt-controller/irq.h> |
Jim Liu | 74bf489 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 7 | #include <dt-bindings/gpio/gpio.h> |
Jim Liu | dd08078 | 2024-01-24 09:54:51 +0800 | [diff] [blame] | 8 | #include <dt-bindings/reset/nuvoton,npcm8xx-reset.h> |
Jim Liu | 9ca71c9 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 9 | |
| 10 | / { |
| 11 | #address-cells = <2>; |
| 12 | #size-cells = <2>; |
| 13 | interrupt-parent = <&gic>; |
| 14 | |
| 15 | soc { |
| 16 | #address-cells = <2>; |
| 17 | #size-cells = <2>; |
| 18 | compatible = "simple-bus"; |
| 19 | interrupt-parent = <&gic>; |
| 20 | ranges; |
| 21 | |
| 22 | gcr: system-controller@f0800000 { |
| 23 | compatible = "nuvoton,npcm845-gcr", "syscon"; |
| 24 | reg = <0x0 0xf0800000 0x0 0x1000>; |
| 25 | }; |
| 26 | |
| 27 | gic: interrupt-controller@dfff9000 { |
| 28 | compatible = "arm,gic-400"; |
| 29 | reg = <0x0 0xdfff9000 0x0 0x1000>, |
| 30 | <0x0 0xdfffa000 0x0 0x2000>, |
| 31 | <0x0 0xdfffc000 0x0 0x2000>, |
| 32 | <0x0 0xdfffe000 0x0 0x2000>; |
| 33 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| 34 | #interrupt-cells = <3>; |
| 35 | interrupt-controller; |
| 36 | #address-cells = <0>; |
| 37 | ppi-partitions { |
| 38 | ppi_cluster0: interrupt-partition-0 { |
| 39 | affinity = <&cpu0 &cpu1 &cpu2 &cpu3>; |
| 40 | }; |
| 41 | }; |
| 42 | }; |
| 43 | }; |
| 44 | |
| 45 | ahb { |
| 46 | #address-cells = <2>; |
| 47 | #size-cells = <2>; |
| 48 | compatible = "simple-bus"; |
| 49 | interrupt-parent = <&gic>; |
| 50 | ranges; |
| 51 | |
| 52 | rstc: reset-controller@f0801000 { |
| 53 | compatible = "nuvoton,npcm845-reset"; |
| 54 | reg = <0x0 0xf0801000 0x0 0x78>; |
| 55 | #reset-cells = <2>; |
| 56 | nuvoton,sysgcr = <&gcr>; |
| 57 | }; |
| 58 | |
| 59 | clk: clock-controller@f0801000 { |
| 60 | compatible = "nuvoton,npcm845-clk"; |
| 61 | #clock-cells = <1>; |
| 62 | reg = <0x0 0xf0801000 0x0 0x1000>; |
| 63 | }; |
| 64 | |
Jim Liu | 74bf489 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 65 | sdhci0: sdhci@f0842000 { |
| 66 | compatible = "nuvoton,npcm845-sdhci"; |
| 67 | reg = <0x0 0xf0842000 0x0 0x100>; |
| 68 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| 69 | clocks = <&clk NPCM8XX_CLK_AHB>; |
| 70 | clock-names = "clk_mmc"; |
| 71 | pinctrl-names = "default"; |
| 72 | pinctrl-0 = <&mmc8_pins |
| 73 | &mmc_pins>; |
| 74 | status = "disabled"; |
| 75 | }; |
| 76 | |
| 77 | fiu0: spi@fb000000 { |
| 78 | compatible = "nuvoton,npcm845-fiu"; |
| 79 | #address-cells = <1>; |
| 80 | #size-cells = <0>; |
| 81 | reg = <0x0 0xfb000000 0x0 0x1000>, |
| 82 | <0x0 0x80000000 0x0 0x10000000>; |
| 83 | reg-names = "control", "memory"; |
| 84 | clocks = <&clk NPCM8XX_CLK_SPI0>; |
| 85 | clock-names = "clk_ahb"; |
| 86 | status = "disabled"; |
| 87 | }; |
| 88 | |
| 89 | fiu1: spi@fb002000 { |
| 90 | compatible = "nuvoton,npcm845-fiu"; |
| 91 | #address-cells = <1>; |
| 92 | #size-cells = <0>; |
| 93 | reg = <0x0 0xfb002000 0x0 0x1000>, |
| 94 | <0x0 0x90000000 0x0 0x4000000>; |
| 95 | reg-names = "control", "memory"; |
| 96 | clocks = <&clk NPCM8XX_CLK_SPI1>; |
| 97 | clock-names = "clk_spi1"; |
| 98 | pinctrl-names = "default"; |
| 99 | pinctrl-0 = <&spi1_pins>; |
| 100 | status = "disabled"; |
| 101 | }; |
| 102 | |
| 103 | fiu3: spi@c0000000 { |
| 104 | compatible = "nuvoton,npcm845-fiu"; |
| 105 | #address-cells = <1>; |
| 106 | #size-cells = <0>; |
| 107 | reg = <0x0 0xc0000000 0x0 0x1000>, |
| 108 | <0x0 0xA0000000 0x0 0x20000000>; |
| 109 | reg-names = "control", "memory"; |
| 110 | clocks = <&clk NPCM8XX_CLK_SPI3>; |
| 111 | clock-names = "clk_spi3"; |
| 112 | pinctrl-names = "default"; |
| 113 | pinctrl-0 = <&spi3_pins>; |
| 114 | status = "disabled"; |
| 115 | }; |
| 116 | |
| 117 | fiux: spi@fb001000 { |
| 118 | compatible = "nuvoton,npcm845-fiu"; |
| 119 | #address-cells = <1>; |
| 120 | #size-cells = <0>; |
| 121 | reg = <0x0 0xfb001000 0x0 0x1000>, |
| 122 | <0x0 0xf8000000 0x0 0x2000000>; |
| 123 | reg-names = "control", "memory"; |
| 124 | clocks = <&clk NPCM8XX_CLK_SPIX>; |
| 125 | clock-names = "clk_ahb"; |
| 126 | status = "disabled"; |
| 127 | }; |
| 128 | |
Jim Liu | 9ca71c9 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 129 | apb { |
| 130 | #address-cells = <1>; |
| 131 | #size-cells = <1>; |
| 132 | compatible = "simple-bus"; |
| 133 | interrupt-parent = <&gic>; |
| 134 | ranges = <0x0 0x0 0xf0000000 0x00300000>, |
| 135 | <0xfff00000 0x0 0xfff00000 0x00016000>; |
| 136 | |
Jim Liu | 438d253 | 2023-11-14 16:51:56 +0800 | [diff] [blame] | 137 | host_intf: host_intf@9f000 { |
| 138 | compatible = "nuvoton,npcm845-host-intf"; |
| 139 | reg = <0x9f000 0x1000>; |
| 140 | type = "espi"; |
| 141 | ioaddr = <0x4e>; |
| 142 | channel-support = <0xf>; |
| 143 | syscon = <&gcr>; |
| 144 | }; |
| 145 | |
| 146 | pspi: spi@201000 { |
Jim Liu | 74bf489 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 147 | compatible = "nuvoton,npcm845-pspi"; |
| 148 | reg = <0x201000 0x1000>; |
| 149 | pinctrl-names = "default"; |
| 150 | pinctrl-0 = <&pspi_pins>; |
| 151 | #address-cells = <1>; |
| 152 | #size-cells = <0>; |
| 153 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; |
| 154 | clocks = <&clk NPCM8XX_CLK_APB5>; |
| 155 | clock-names = "clk_apb5"; |
Jim Liu | dd08078 | 2024-01-24 09:54:51 +0800 | [diff] [blame] | 156 | resets = <&rstc NPCM8XX_RESET_IPSRST2 NPCM8XX_RESET_PSPI2>; |
Jim Liu | 74bf489 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 157 | status = "disabled"; |
| 158 | }; |
| 159 | |
Jim Liu | 9ca71c9 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 160 | timer0: timer@8000 { |
| 161 | compatible = "nuvoton,npcm845-timer"; |
| 162 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
| 163 | reg = <0x8000 0x1C>; |
| 164 | clocks = <&clk NPCM8XX_CLK_REFCLK>; |
| 165 | clock-names = "refclk"; |
| 166 | }; |
| 167 | |
| 168 | serial0: serial@0 { |
| 169 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 170 | reg = <0x0 0x1000>; |
| 171 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 172 | interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; |
| 173 | reg-shift = <2>; |
| 174 | status = "disabled"; |
| 175 | }; |
| 176 | |
| 177 | serial1: serial@1000 { |
| 178 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 179 | reg = <0x1000 0x1000>; |
| 180 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 181 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; |
| 182 | reg-shift = <2>; |
| 183 | status = "disabled"; |
| 184 | }; |
| 185 | |
| 186 | serial2: serial@2000 { |
| 187 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 188 | reg = <0x2000 0x1000>; |
| 189 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 190 | interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; |
| 191 | reg-shift = <2>; |
| 192 | status = "disabled"; |
| 193 | }; |
| 194 | |
| 195 | serial3: serial@3000 { |
| 196 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 197 | reg = <0x3000 0x1000>; |
| 198 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 199 | interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; |
| 200 | reg-shift = <2>; |
| 201 | status = "disabled"; |
| 202 | }; |
| 203 | |
| 204 | serial4: serial@4000 { |
| 205 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 206 | reg = <0x4000 0x1000>; |
| 207 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 208 | interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; |
| 209 | reg-shift = <2>; |
| 210 | status = "disabled"; |
| 211 | }; |
| 212 | |
| 213 | serial5: serial@5000 { |
| 214 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 215 | reg = <0x5000 0x1000>; |
| 216 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 217 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; |
| 218 | reg-shift = <2>; |
| 219 | status = "disabled"; |
| 220 | }; |
| 221 | |
| 222 | serial6: serial@6000 { |
| 223 | compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart"; |
| 224 | reg = <0x6000 0x1000>; |
| 225 | clocks = <&clk NPCM8XX_CLK_UART>; |
| 226 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>; |
| 227 | reg-shift = <2>; |
| 228 | status = "disabled"; |
| 229 | }; |
| 230 | |
| 231 | watchdog0: watchdog@801c { |
| 232 | compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt"; |
| 233 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; |
| 234 | reg = <0x801c 0x4>; |
| 235 | status = "disabled"; |
| 236 | clocks = <&clk NPCM8XX_CLK_REFCLK>; |
| 237 | syscon = <&gcr>; |
| 238 | }; |
| 239 | |
| 240 | watchdog1: watchdog@901c { |
| 241 | compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt"; |
| 242 | interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
| 243 | reg = <0x901c 0x4>; |
| 244 | status = "disabled"; |
| 245 | clocks = <&clk NPCM8XX_CLK_REFCLK>; |
| 246 | syscon = <&gcr>; |
| 247 | }; |
| 248 | |
| 249 | watchdog2: watchdog@a01c { |
| 250 | compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt"; |
| 251 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
| 252 | reg = <0xa01c 0x4>; |
| 253 | status = "disabled"; |
| 254 | clocks = <&clk NPCM8XX_CLK_REFCLK>; |
| 255 | syscon = <&gcr>; |
| 256 | }; |
Jim Liu | 74bf489 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 257 | |
| 258 | i2c0: i2c@80000 { |
| 259 | compatible = "nuvoton,npcm845-i2c"; |
| 260 | reg = <0x80000 0x1000>; |
| 261 | #address-cells = <1>; |
| 262 | #size-cells = <0>; |
| 263 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 264 | clock-frequency = <100000>; |
| 265 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; |
| 266 | pinctrl-names = "default"; |
| 267 | pinctrl-0 = <&smb0_pins>; |
| 268 | syscon = <&gcr>; |
| 269 | status = "disabled"; |
| 270 | }; |
Jim Liu | 04bd6c8 | 2023-01-17 16:59:21 +0800 | [diff] [blame] | 271 | |
| 272 | i2c1: i2c@81000 { |
| 273 | compatible = "nuvoton,npcm845-i2c"; |
| 274 | reg = <0x81000 0x1000>; |
| 275 | #address-cells = <1>; |
| 276 | #size-cells = <0>; |
| 277 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 278 | clock-frequency = <100000>; |
| 279 | interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; |
| 280 | pinctrl-names = "default"; |
| 281 | pinctrl-0 = <&smb1_pins>; |
| 282 | syscon = <&gcr>; |
| 283 | status = "disabled"; |
| 284 | }; |
| 285 | |
| 286 | i2c2: i2c@82000 { |
| 287 | compatible = "nuvoton,npcm845-i2c"; |
| 288 | reg = <0x82000 0x1000>; |
| 289 | #address-cells = <1>; |
| 290 | #size-cells = <0>; |
| 291 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 292 | clock-frequency = <100000>; |
| 293 | interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; |
| 294 | pinctrl-names = "default"; |
| 295 | pinctrl-0 = <&smb2_pins>; |
| 296 | syscon = <&gcr>; |
| 297 | status = "disabled"; |
| 298 | }; |
| 299 | |
| 300 | i2c3: i2c@83000 { |
| 301 | compatible = "nuvoton,npcm845-i2c"; |
| 302 | reg = <0x83000 0x1000>; |
| 303 | #address-cells = <1>; |
| 304 | #size-cells = <0>; |
| 305 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 306 | clock-frequency = <100000>; |
| 307 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; |
| 308 | pinctrl-names = "default"; |
| 309 | pinctrl-0 = <&smb3_pins>; |
| 310 | syscon = <&gcr>; |
| 311 | status = "disabled"; |
| 312 | }; |
| 313 | |
| 314 | i2c4: i2c@84000 { |
| 315 | compatible = "nuvoton,npcm845-i2c"; |
| 316 | reg = <0x84000 0x1000>; |
| 317 | #address-cells = <1>; |
| 318 | #size-cells = <0>; |
| 319 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 320 | clock-frequency = <100000>; |
| 321 | interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; |
| 322 | pinctrl-names = "default"; |
| 323 | pinctrl-0 = <&smb4_pins>; |
| 324 | syscon = <&gcr>; |
| 325 | status = "disabled"; |
| 326 | }; |
| 327 | |
| 328 | i2c5: i2c@85000 { |
| 329 | compatible = "nuvoton,npcm845-i2c"; |
| 330 | reg = <0x85000 0x1000>; |
| 331 | #address-cells = <1>; |
| 332 | #size-cells = <0>; |
| 333 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 334 | clock-frequency = <100000>; |
| 335 | interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; |
| 336 | pinctrl-names = "default"; |
| 337 | pinctrl-0 = <&smb5_pins>; |
| 338 | syscon = <&gcr>; |
| 339 | status = "disabled"; |
| 340 | }; |
| 341 | |
| 342 | i2c6: i2c@86000 { |
| 343 | compatible = "nuvoton,npcm845-i2c"; |
| 344 | reg = <0x86000 0x1000>; |
| 345 | #address-cells = <1>; |
| 346 | #size-cells = <0>; |
| 347 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 348 | clock-frequency = <100000>; |
| 349 | interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; |
| 350 | pinctrl-names = "default"; |
| 351 | pinctrl-0 = <&smb6_pins>; |
| 352 | syscon = <&gcr>; |
| 353 | status = "disabled"; |
| 354 | }; |
| 355 | |
| 356 | i2c7: i2c@87000 { |
| 357 | compatible = "nuvoton,npcm845-i2c"; |
| 358 | reg = <0x87000 0x1000>; |
| 359 | #address-cells = <1>; |
| 360 | #size-cells = <0>; |
| 361 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 362 | clock-frequency = <100000>; |
| 363 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; |
| 364 | pinctrl-names = "default"; |
| 365 | pinctrl-0 = <&smb7_pins>; |
| 366 | syscon = <&gcr>; |
| 367 | status = "disabled"; |
| 368 | }; |
| 369 | |
| 370 | i2c8: i2c@88000 { |
| 371 | compatible = "nuvoton,npcm845-i2c"; |
| 372 | reg = <0x88000 0x1000>; |
| 373 | #address-cells = <1>; |
| 374 | #size-cells = <0>; |
| 375 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 376 | clock-frequency = <100000>; |
| 377 | interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; |
| 378 | pinctrl-names = "default"; |
| 379 | pinctrl-0 = <&smb8_pins>; |
| 380 | syscon = <&gcr>; |
| 381 | status = "disabled"; |
| 382 | }; |
| 383 | |
| 384 | i2c9: i2c@89000 { |
| 385 | compatible = "nuvoton,npcm845-i2c"; |
| 386 | reg = <0x89000 0x1000>; |
| 387 | #address-cells = <1>; |
| 388 | #size-cells = <0>; |
| 389 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 390 | clock-frequency = <100000>; |
| 391 | interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; |
| 392 | pinctrl-names = "default"; |
| 393 | pinctrl-0 = <&smb9_pins>; |
| 394 | syscon = <&gcr>; |
| 395 | status = "disabled"; |
| 396 | }; |
| 397 | |
| 398 | i2c10: i2c@8a000 { |
| 399 | compatible = "nuvoton,npcm845-i2c"; |
| 400 | reg = <0x8a000 0x1000>; |
| 401 | #address-cells = <1>; |
| 402 | #size-cells = <0>; |
| 403 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 404 | clock-frequency = <100000>; |
| 405 | interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; |
| 406 | pinctrl-names = "default"; |
| 407 | pinctrl-0 = <&smb10_pins>; |
| 408 | syscon = <&gcr>; |
| 409 | status = "disabled"; |
| 410 | }; |
| 411 | |
| 412 | i2c11: i2c@8b000 { |
| 413 | compatible = "nuvoton,npcm845-i2c"; |
| 414 | reg = <0x8b000 0x1000>; |
| 415 | #address-cells = <1>; |
| 416 | #size-cells = <0>; |
| 417 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 418 | clock-frequency = <100000>; |
| 419 | interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; |
| 420 | pinctrl-names = "default"; |
| 421 | pinctrl-0 = <&smb11_pins>; |
| 422 | syscon = <&gcr>; |
| 423 | status = "disabled"; |
| 424 | }; |
| 425 | |
| 426 | i2c12: i2c@8c000 { |
| 427 | compatible = "nuvoton,npcm845-i2c"; |
| 428 | reg = <0x8c000 0x1000>; |
| 429 | #address-cells = <1>; |
| 430 | #size-cells = <0>; |
| 431 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 432 | clock-frequency = <100000>; |
| 433 | interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; |
| 434 | pinctrl-names = "default"; |
| 435 | pinctrl-0 = <&smb12_pins>; |
| 436 | syscon = <&gcr>; |
| 437 | status = "disabled"; |
| 438 | }; |
| 439 | |
| 440 | i2c13: i2c@8d000 { |
| 441 | compatible = "nuvoton,npcm845-i2c"; |
| 442 | reg = <0x8d000 0x1000>; |
| 443 | #address-cells = <1>; |
| 444 | #size-cells = <0>; |
| 445 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 446 | clock-frequency = <100000>; |
| 447 | interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; |
| 448 | pinctrl-names = "default"; |
| 449 | pinctrl-0 = <&smb13_pins>; |
| 450 | syscon = <&gcr>; |
| 451 | status = "disabled"; |
| 452 | }; |
| 453 | |
| 454 | i2c14: i2c@8e000 { |
| 455 | compatible = "nuvoton,npcm845-i2c"; |
| 456 | reg = <0x8e000 0x1000>; |
| 457 | #address-cells = <1>; |
| 458 | #size-cells = <0>; |
| 459 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 460 | clock-frequency = <100000>; |
| 461 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; |
| 462 | pinctrl-names = "default"; |
| 463 | pinctrl-0 = <&smb14_pins>; |
| 464 | syscon = <&gcr>; |
| 465 | status = "disabled"; |
| 466 | }; |
| 467 | |
| 468 | i2c15: i2c@8f000 { |
| 469 | compatible = "nuvoton,npcm845-i2c"; |
| 470 | reg = <0x8f000 0x1000>; |
| 471 | #address-cells = <1>; |
| 472 | #size-cells = <0>; |
| 473 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 474 | clock-frequency = <100000>; |
| 475 | interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; |
| 476 | pinctrl-names = "default"; |
| 477 | pinctrl-0 = <&smb15_pins>; |
| 478 | syscon = <&gcr>; |
| 479 | status = "disabled"; |
| 480 | }; |
| 481 | |
| 482 | i2c16: i2c@fff00000 { |
| 483 | compatible = "nuvoton,npcm845-i2c"; |
| 484 | reg = <0xfff00000 0x1000>; |
| 485 | #address-cells = <1>; |
| 486 | #size-cells = <0>; |
| 487 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 488 | clock-frequency = <100000>; |
| 489 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
| 490 | pinctrl-names = "default"; |
| 491 | pinctrl-0 = <&smb16_pins>; |
| 492 | syscon = <&gcr>; |
| 493 | status = "disabled"; |
| 494 | }; |
| 495 | |
| 496 | i2c17: i2c@fff01000 { |
| 497 | compatible = "nuvoton,npcm845-i2c"; |
| 498 | reg = <0xfff01000 0x1000>; |
| 499 | #address-cells = <1>; |
| 500 | #size-cells = <0>; |
| 501 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 502 | clock-frequency = <100000>; |
| 503 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
| 504 | pinctrl-names = "default"; |
| 505 | pinctrl-0 = <&smb17_pins>; |
| 506 | syscon = <&gcr>; |
| 507 | status = "disabled"; |
| 508 | }; |
| 509 | |
| 510 | i2c18: i2c@fff02000 { |
| 511 | compatible = "nuvoton,npcm845-i2c"; |
| 512 | reg = <0xfff02000 0x1000>; |
| 513 | #address-cells = <1>; |
| 514 | #size-cells = <0>; |
| 515 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 516 | clock-frequency = <100000>; |
| 517 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; |
| 518 | pinctrl-names = "default"; |
| 519 | pinctrl-0 = <&smb18_pins>; |
| 520 | syscon = <&gcr>; |
| 521 | status = "disabled"; |
| 522 | }; |
| 523 | |
| 524 | i2c19: i2c@fff03000 { |
| 525 | compatible = "nuvoton,npcm845-i2c"; |
| 526 | reg = <0xfff03000 0x1000>; |
| 527 | #address-cells = <1>; |
| 528 | #size-cells = <0>; |
| 529 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 530 | clock-frequency = <100000>; |
| 531 | interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; |
| 532 | pinctrl-names = "default"; |
| 533 | pinctrl-0 = <&smb19_pins>; |
| 534 | syscon = <&gcr>; |
| 535 | status = "disabled"; |
| 536 | }; |
| 537 | |
| 538 | i2c20: i2c@fff04000 { |
| 539 | compatible = "nuvoton,npcm845-i2c"; |
| 540 | reg = <0xfff04000 0x1000>; |
| 541 | #address-cells = <1>; |
| 542 | #size-cells = <0>; |
| 543 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 544 | clock-frequency = <100000>; |
| 545 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| 546 | pinctrl-names = "default"; |
| 547 | pinctrl-0 = <&smb20_pins>; |
| 548 | syscon = <&gcr>; |
| 549 | status = "disabled"; |
| 550 | }; |
| 551 | |
| 552 | i2c21: i2c@fff05000 { |
| 553 | compatible = "nuvoton,npcm845-i2c"; |
| 554 | reg = <0xfff05000 0x1000>; |
| 555 | #address-cells = <1>; |
| 556 | #size-cells = <0>; |
| 557 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 558 | clock-frequency = <100000>; |
| 559 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
| 560 | pinctrl-names = "default"; |
| 561 | pinctrl-0 = <&smb21_pins>; |
| 562 | syscon = <&gcr>; |
| 563 | status = "disabled"; |
| 564 | }; |
| 565 | |
| 566 | i2c22: i2c@fff06000 { |
| 567 | compatible = "nuvoton,npcm845-i2c"; |
| 568 | reg = <0xfff06000 0x1000>; |
| 569 | #address-cells = <1>; |
| 570 | #size-cells = <0>; |
| 571 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 572 | clock-frequency = <100000>; |
| 573 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
| 574 | pinctrl-names = "default"; |
| 575 | pinctrl-0 = <&smb22_pins>; |
| 576 | syscon = <&gcr>; |
| 577 | status = "disabled"; |
| 578 | }; |
| 579 | |
| 580 | i2c23: i2c@fff07000 { |
| 581 | compatible = "nuvoton,npcm845-i2c"; |
| 582 | reg = <0xfff07000 0x1000>; |
| 583 | #address-cells = <1>; |
| 584 | #size-cells = <0>; |
| 585 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 586 | clock-frequency = <100000>; |
| 587 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
| 588 | pinctrl-names = "default"; |
| 589 | pinctrl-0 = <&smb23_pins>; |
| 590 | syscon = <&gcr>; |
| 591 | status = "disabled"; |
| 592 | }; |
| 593 | |
| 594 | i2c24: i2c@fff08000 { |
| 595 | compatible = "nuvoton,npcm845-i2c"; |
| 596 | reg = <0xfff08000 0x1000>; |
| 597 | #address-cells = <1>; |
| 598 | #size-cells = <0>; |
| 599 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 600 | clock-frequency = <100000>; |
| 601 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
| 602 | syscon = <&gcr>; |
| 603 | status = "disabled"; |
| 604 | }; |
| 605 | |
| 606 | i2c25: i2c@fff09000 { |
| 607 | compatible = "nuvoton,npcm845-i2c"; |
| 608 | reg = <0xfff09000 0x1000>; |
| 609 | #address-cells = <1>; |
| 610 | #size-cells = <0>; |
| 611 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 612 | clock-frequency = <100000>; |
| 613 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
| 614 | syscon = <&gcr>; |
| 615 | status = "disabled"; |
| 616 | }; |
| 617 | |
| 618 | i2c26: i2c@fff0a000 { |
| 619 | compatible = "nuvoton,npcm845-i2c"; |
| 620 | reg = <0xfff0a000 0x1000>; |
| 621 | #address-cells = <1>; |
| 622 | #size-cells = <0>; |
| 623 | clocks = <&clk NPCM8XX_CLK_APB2>; |
| 624 | clock-frequency = <100000>; |
| 625 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
| 626 | syscon = <&gcr>; |
| 627 | status = "disabled"; |
| 628 | }; |
Jim Liu | 9ca71c9 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 629 | }; |
| 630 | }; |
| 631 | }; |