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wdenk8ed96042005-01-09 23:16:25 +00001/*
2 * (C) Copyright 2004
3 * Texas Instruments, <www.ti.com>
4 * Richard Woodruff <r-woodruff2@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#include <common.h>
23#include <asm/arch/omap2420.h>
24#include <asm/io.h>
25#include <asm/arch/bits.h>
26#include <asm/arch/mem.h> /* get mem tables */
27#include <asm/arch/sys_proto.h>
28#include <asm/arch/sys_info.h>
29#include <i2c.h>
30
31/**************************************************************************
32 * get_cpu_type() - low level get cpu type
33 * - no C globals yet.
34 * - just looking to say if this is a 2422 or 2420 or ...
35 * - to start with we will look at switch settings..
36 * - 2422 id's same as 2420 for ES1 will rely on H4 board characteristics
37 * (mux for 2420, non-mux for 2422).
38 ***************************************************************************/
39u32 get_cpu_type(void)
40{
41 u32 v;
42
43 v = __raw_readl(TAP_IDCODE_REG);
44 v &= CPU_24XX_ID_MASK;
45 if (v == CPU_2420_CHIPID) { /* currently 2420 and 2422 have same id */
46 if (is_gpmc_muxed() == GPMC_MUXED) /* if mux'ed */
47 return(CPU_2420);
48 else
49 return(CPU_2422);
50 } else
51 return(CPU_2420); /* don't know, say 2420 */
52}
53
54/******************************************
55 * get_cpu_rev(void) - extract version info
56 ******************************************/
57u32 get_cpu_rev(void)
58{
59 u32 v;
60 v = __raw_readl(TAP_IDCODE_REG);
61 v = v >> 28;
62 return(v+1); /* currently 2422 and 2420 match up */
63}
64
65/***********************************************************
66 * get_mem_type() - identify type of mDDR part used.
67 * 2422 uses stacked DDR, 2 parts CS0/CS1.
68 * 2420 may have 1 or 2, no good way to know...only init 1...
69 * when eeprom data is up we can select 1 more.
70 *************************************************************/
71u32 get_mem_type(void)
72{
wdenk289f9322005-01-12 00:15:14 +000073 volatile u32 *burst = (volatile u32 *)(SDRC_MR_0+SDRC_CS0_OSET);
74
wdenk8ed96042005-01-09 23:16:25 +000075 if (get_cpu_type() == CPU_2422)
76 return(DDR_STACKED);
77
78 if (get_board_type() == BOARD_H4_MENELAUS)
wdenk289f9322005-01-12 00:15:14 +000079 if(*burst == H4_2420_SDRC_MR_0_SDR)
80 return(SDR_DISCRETE);
81 else
82 return(DDR_COMBO);
wdenk8ed96042005-01-09 23:16:25 +000083 else
wdenk289f9322005-01-12 00:15:14 +000084 if(*burst == H4_2420_SDRC_MR_0_SDR) /* SDP + SDR kit */
85 return(SDR_DISCRETE);
86 else
87 return(DDR_DISCRETE); /* origional SDP */
wdenk8ed96042005-01-09 23:16:25 +000088}
89
90/***********************************************************************
91 * get_board_type() - get board type based on current production stats.
92 * --- NOTE: 2 I2C EEPROMs will someday be populated with proper info.
93 * when they are available we can get info from there. This should
94 * be correct of all known boards up until today.
95 ************************************************************************/
96u32 get_board_type(void)
97{
98 if (i2c_probe(I2C_MENELAUS) == 0)
99 return(BOARD_H4_MENELAUS);
100 else
101 return(BOARD_H4_SDP);
102}
103
104/******************************************************************
105 * get_sysboot_value() - get init word settings (dip switch on h4)
106 ******************************************************************/
107u32 get_sysboot_value(void)
108{
109 return(0x00000FFF & __raw_readl(CONTROL_STATUS));
110}
111
112/***************************************************************************
113 * get_gpmc0_base() - Return current address hardware will be
114 * fetching from. The below effectively gives what is correct, its a bit
115 * mis-leading compared to the TRM. For the most general case the mask
116 * needs to be also taken into account this does work in practice.
117 * - for u-boot we currently map:
118 * -- 0 to nothing,
119 * -- 4 to flash
120 * -- 8 to enent
121 * -- c to wifi
122 ****************************************************************************/
123u32 get_gpmc0_base(void)
124{
125 u32 b;
126
127 b = __raw_readl(GPMC_CONFIG7_0);
128 b &= 0x1F; /* keep base [5:0] */
129 b = b << 24; /* ret 0x0b000000 */
130 return(b);
131}
132
133/*****************************************************************
134 * is_gpmc_muxed() - tells if address/data lines are multiplexed
135 *****************************************************************/
136u32 is_gpmc_muxed(void)
137{
138 u32 mux;
139 mux = get_sysboot_value();
wdenk289f9322005-01-12 00:15:14 +0000140 if ((mux & (BIT0 | BIT1 | BIT2 | BIT3)) == (BIT0 | BIT2 | BIT3))
141 return(GPMC_MUXED); /* NAND Boot mode */
wdenk8ed96042005-01-09 23:16:25 +0000142 if (mux & BIT1) /* if mux'ed */
143 return(GPMC_MUXED);
144 else
145 return(GPMC_NONMUXED);
146}
147
148/************************************************************************
149 * get_gpmc0_type() - read sysboot lines to see type of memory attached
150 ************************************************************************/
151u32 get_gpmc0_type(void)
152{
153 u32 type;
154 type = get_sysboot_value();
155 if ((type & (BIT3|BIT2)) == (BIT3|BIT2))
156 return(TYPE_NAND);
157 else
158 return(TYPE_NOR);
159}
160
161/*******************************************************************
162 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
163 *******************************************************************/
164u32 get_gpmc0_width(void)
165{
166 u32 width;
167 width = get_sysboot_value();
168 if ((width & 0xF) == (BIT3|BIT2))
169 return(WIDTH_8BIT);
170 else
171 return(WIDTH_16BIT);
172}
173
174/*********************************************************************
175 * wait_on_value() - common routine to allow waiting for changes in
176 * volatile regs.
177 *********************************************************************/
178u32 wait_on_value(u32 read_bit_mask, u32 match_value, u32 read_addr, u32 bound)
179{
180 u32 i = 0, val;
181 do {
182 ++i;
183 val = __raw_readl(read_addr) & read_bit_mask;
184 if (val == match_value)
185 return(1);
186 if (i==bound)
187 return(0);
188 } while (1);
189}
190
191/*********************************************************************
192 * display_board_info() - print banner with board info.
193 *********************************************************************/
194void display_board_info(u32 btype)
195{
196 char cpu_2420[] = "2420";
197 char cpu_2422[] = "2422";
198 char db_men[] = "Menelaus";
199 char db_ip[]= "IP";
200 char *cpu_s, *db_s;
201 u32 cpu = get_cpu_type();
202
203 if(cpu == CPU_2420)
204 cpu_s = cpu_2420;
205 else
206 cpu_s = cpu_2422;
207 if(btype == BOARD_H4_MENELAUS)
208 db_s = db_men;
209 else
210 db_s = db_ip;
211 printf("TI H4 SDP Base Board with OMAP%s %s Daughter Board\n",cpu_s, db_s);
212}
wdenk289f9322005-01-12 00:15:14 +0000213
214/*************************************************************************
215 * get_board_rev() - setup to pass kernel board revision information
216 * 0 = 242x IP platform (first 2xx boards)
217 * 1 = 242x Menelaus platfrom.
218 *************************************************************************/
219u32 get_board_rev(void)
220{
221 u32 rev = 0;
222 u32 btype = get_board_type();
223
224 if (btype == BOARD_H4_MENELAUS){
225 rev = 1;
226 }
227 return(rev);
228}
229
230/********************************************************
231 * get_base(); get upper addr of current execution
232 *******************************************************/
233static u32 get_base(void)
234{
235 u32 val;
236 __asm__ __volatile__("mov %0, pc \n" : "=r" (val) : : "memory");
237 val &= 0xF0000000;
238 val >>= 28;
239 return(val);
240}
241
242/********************************************************
243 * get_base2(); get 2upper addr of current execution
244 *******************************************************/
245static u32 get_base2(void)
246{
247 u32 val;
248 __asm__ __volatile__("mov %0, pc \n" : "=r" (val) : : "memory");
249 val &= 0xFF000000;
250 val >>= 24;
251 return(val);
252}
253
wdenk289f9322005-01-12 00:15:14 +0000254/********************************************************
255 * running_in_flash() - tell if currently running in
256 * flash.
257 *******************************************************/
258u32 running_in_flash(void)
259{
260 if (get_base() < 4)
261 return(1); /* in flash */
262 return(0); /* running in SRAM or SDRAM */
263}
264
265/********************************************************
266 * running_in_sram() - tell if currently running in
267 * sram.
268 *******************************************************/
269u32 running_in_sram(void)
270{
271 if (get_base() == 4)
272 return(1); /* in SRAM */
273 return(0); /* running in FLASH or SDRAM */
274}
275/********************************************************
276 * running_in_sdram() - tell if currently running in
277 * flash.
278 *******************************************************/
279u32 running_in_sdram(void)
280{
281 if (get_base() > 4)
282 return(1); /* in sdram */
283 return(0); /* running in SRAM or FLASH */
284}
285
286/*************************************************************
287 * running_from_internal_boot() - am I a signed NOR image.
288 *************************************************************/
289u32 running_from_internal_boot(void)
290{
291 u32 v, base;
292
293 v = get_sysboot_value() & BIT3;
294 base = get_base2();
295 /* if running at mask rom flash address and
296 * sysboot3 says this was an internal boot
297 */
298 if ((base == 0x08) && v)
299 return(1);
300 else
301 return(0);
302}