blob: 3393ad562e8dd35f79f1778a5ec0343306764fbf [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kim Phillips5b8bc602007-12-20 14:09:22 -06002/*
3 * Copyright 2007 Freescale Semiconductor, Inc.
4 *
5 * (C) Copyright 2000
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Kim Phillips5b8bc602007-12-20 14:09:22 -06007 */
8
9#include <common.h>
Simon Glassd96c2602019-12-28 10:44:58 -070010#include <clock_legacy.h>
Simon Glass401d1c42020-10-30 21:38:53 -060011#include <asm/global_data.h>
Masahiro Yamadab08c8c42018-03-05 01:20:11 +090012#include <linux/libfdt.h>
Kim Phillips5b8bc602007-12-20 14:09:22 -060013#include <fdt_support.h>
Kim Phillips6b70ffb2008-06-16 15:55:53 -050014#include <asm/processor.h>
Kim Phillips5b8bc602007-12-20 14:09:22 -060015
Kumar Gala69018ce2008-01-17 08:25:45 -060016extern void ft_qe_setup(void *blob);
17
Kim Phillips5b8bc602007-12-20 14:09:22 -060018DECLARE_GLOBAL_DATA_PTR;
19
Heiko Schocher62ddcf02010-02-18 08:08:25 +010020#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
Mario Six9403fc42019-01-21 09:17:25 +010021 (defined(CONFIG_QE) && !defined(CONFIG_ARCH_MPC831X))
Zhao Qiang38d67a4e2014-06-03 16:27:07 +080022#include <linux/immap_qe.h>
Heiko Schocherf70fd132009-02-24 11:30:51 +010023
24void fdt_fixup_muram (void *blob)
25{
26 ulong data[2];
27
28 data[0] = 0;
29 data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
Heiko Schocher14b93082009-04-24 06:50:45 +020030 do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
31 data, sizeof (data), 0);
Heiko Schocherf70fd132009-02-24 11:30:51 +010032}
33#endif
34
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +090035void ft_cpu_setup(void *blob, struct bd_info *bd)
Kim Phillips5b8bc602007-12-20 14:09:22 -060036{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020037 immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
Kim Phillips6b70ffb2008-06-16 15:55:53 -050038 int spridr = immr->sysconf.spridr;
39
40 /*
41 * delete crypto node if not on an E-processor
42 * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
43 * EA revisions got the SEC uprevved to 2.4 but since the default device
44 * tree contains SEC 2.0 properties we uprev them here.
45 */
46 if (!IS_E_PROCESSOR(spridr))
47 fdt_fixup_crypto_node(blob, 0);
48 else if (IS_E_PROCESSOR(spridr) &&
49 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
50 SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
51 REVID_MAJOR(spridr) >= 2)
52 fdt_fixup_crypto_node(blob, 0x0204);
53
Kim Phillips5b8bc602007-12-20 14:09:22 -060054#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
richardretanubunc68a05f2008-09-29 18:28:23 -040055 defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
56 defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
Mario Six9403fc42019-01-21 09:17:25 +010057#ifdef CONFIG_ARCH_MPC8313
Kim Phillips7120c882009-10-12 11:06:19 -050058 /*
59 * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
60 * h/w (see AN3545). The base device tree in use has rev. 1 ID numbers,
61 * so if on Rev. 2 (and higher) h/w, we fix them up here
62 */
63 if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
64 int nodeoffset, path;
65 const char *prop;
66
67 nodeoffset = fdt_path_offset(blob, "/aliases");
68 if (nodeoffset >= 0) {
69#if defined(CONFIG_HAS_ETH0)
70 prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
71 if (prop) {
72 u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
73
74 path = fdt_path_offset(blob, prop);
Kim Phillipsa2873bd2012-10-29 13:34:39 +000075 prop = fdt_getprop(blob, path, "interrupts",
76 NULL);
Kim Phillips7120c882009-10-12 11:06:19 -050077 if (prop)
78 fdt_setprop(blob, path, "interrupts",
79 &tmp, sizeof(tmp));
80 }
81#endif
82#if defined(CONFIG_HAS_ETH1)
83 prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
84 if (prop) {
85 u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
86
87 path = fdt_path_offset(blob, prop);
Kim Phillipsa2873bd2012-10-29 13:34:39 +000088 prop = fdt_getprop(blob, path, "interrupts",
89 NULL);
Kim Phillips7120c882009-10-12 11:06:19 -050090 if (prop)
91 fdt_setprop(blob, path, "interrupts",
92 &tmp, sizeof(tmp));
93 }
94#endif
95 }
96 }
97#endif
Kim Phillips5b8bc602007-12-20 14:09:22 -060098#endif
99
100 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
101 "timebase-frequency", (bd->bi_busfreq / 4), 1);
102 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
103 "bus-frequency", bd->bi_busfreq, 1);
104 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
Simon Glassc6731fe2012-12-13 20:48:47 +0000105 "clock-frequency", gd->arch.core_clk, 1);
Kim Phillips5b8bc602007-12-20 14:09:22 -0600106 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
107 "bus-frequency", bd->bi_busfreq, 1);
Anton Vorontsov7fa9cbb2008-03-24 20:47:09 +0300108 do_fixup_by_compat_u32(blob, "fsl,soc",
109 "bus-frequency", bd->bi_busfreq, 1);
110 do_fixup_by_compat_u32(blob, "fsl,soc",
111 "clock-frequency", bd->bi_busfreq, 1);
112 do_fixup_by_compat_u32(blob, "fsl,immr",
113 "bus-frequency", bd->bi_busfreq, 1);
114 do_fixup_by_compat_u32(blob, "fsl,immr",
115 "clock-frequency", bd->bi_busfreq, 1);
Kim Phillips5b8bc602007-12-20 14:09:22 -0600116#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -0600117 ft_qe_setup(blob);
Kim Phillips5b8bc602007-12-20 14:09:22 -0600118#endif
119
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#ifdef CONFIG_SYS_NS16550
Mario Six190d3a02019-01-21 09:18:06 +0100121 do_fixup_by_compat_u32(blob, "ns16550",
122 "clock-frequency", get_serial_clock(), 1);
Kim Phillips5b8bc602007-12-20 14:09:22 -0600123#endif
124
Stefan Roesee207f222020-08-12 13:16:36 +0200125 fdt_fixup_memory(blob, (u64)gd->ram_base, (u64)gd->ram_size);
Heiko Schocherf70fd132009-02-24 11:30:51 +0100126
Heiko Schocher99509692014-01-25 07:53:47 +0100127#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
Mario Six9403fc42019-01-21 09:17:25 +0100128 (defined(CONFIG_QE) && !defined(CONFIG_ARCH_MPC831X))
Heiko Schocherf70fd132009-02-24 11:30:51 +0100129 fdt_fixup_muram (blob);
130#endif
Kim Phillips5b8bc602007-12-20 14:09:22 -0600131}