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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Jason Cooper2e0c1c72011-10-03 13:49:53 +05302/*
Tony Dinhfb9ed232022-01-30 15:02:30 -08003 * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com>
4 * (C) Copyright 2011 Jason Cooper <u-boot@lakedaemon.net>
Jason Cooper2e0c1c72011-10-03 13:49:53 +05305 *
6 * Based on work by:
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Siddarth Gore <gores@marvell.com>
Jason Cooper2e0c1c72011-10-03 13:49:53 +05309 */
10
11#ifndef _CONFIG_DREAMPLUG_H
12#define _CONFIG_DREAMPLUG_H
13
Tom Rinif98b3be2021-12-17 18:08:44 -050014#include "mv-common.h"
Jason Cooper2e0c1c72011-10-03 13:49:53 +053015
16/*
Jason Cooper2e0c1c72011-10-03 13:49:53 +053017 * Default environment variables
18 */
Jason Cooper2e0c1c72011-10-03 13:49:53 +053019
20#define CONFIG_EXTRA_ENV_SETTINGS \
21 "x_bootcmd_ethernet=ping 192.168.2.1\0" \
22 "x_bootcmd_usb=usb start\0" \
23 "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \
24 "x_bootargs=console=ttyS0,115200\0" \
25 "x_bootargs_root=root=/dev/sda2 rootdelay=10\0"
26
27/*
28 * Ethernet Driver configuration
29 */
Jason Cooper2e0c1c72011-10-03 13:49:53 +053030#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */
31#define CONFIG_PHY_BASE_ADR 0
Tony Dinhfb9ed232022-01-30 15:02:30 -080032#ifdef CONFIG_RESET_PHY_R
33#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */
34#endif
Jason Cooper2e0c1c72011-10-03 13:49:53 +053035
Tony Dinh46e08f72021-07-25 23:01:20 -070036/*
37 * SATA Driver configuration
38 */
Tony Dinh46e08f72021-07-25 23:01:20 -070039#define CONFIG_LBA48
Tony Dinh46e08f72021-07-25 23:01:20 -070040
Jason Cooper2e0c1c72011-10-03 13:49:53 +053041#endif /* _CONFIG_DREAMPLUG_H */