wdenk | 2d24a3a | 2004-06-09 21:50:45 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * include/configs/mx1ads.h |
| 3 | * |
| 4 | * (c) Copyright 2004 |
| 5 | * Techware Information Technology, Inc. |
| 6 | * http://www.techware.com.tw/ |
| 7 | * |
| 8 | * Ming-Len Wu <minglen_wu@techware.com.tw> |
| 9 | * |
| 10 | * This is the Configuration setting for Motorola MX1ADS board |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | |
| 29 | #ifndef __CONFIG_H |
| 30 | #define __CONFIG_H |
| 31 | |
| 32 | /* |
| 33 | * If we are developing, we might want to start armboot from ram |
| 34 | * so we MUST NOT initialize critical regs like mem-timing ... |
| 35 | */ |
| 36 | #define CONFIG_INIT_CRITICAL /* undef for developing */ |
| 37 | |
| 38 | /* |
| 39 | * High Level Configuration Options |
| 40 | * (easy to change) |
| 41 | */ |
| 42 | #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ |
| 43 | #define CONFIG_MC9328 1 /* It's a Motorola MC9328 SoC */ |
| 44 | #define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */ |
| 45 | |
| 46 | #define BOARD_LATE_INIT 1 |
| 47 | |
| 48 | |
| 49 | #define USE_920T_MMU 1 |
| 50 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
| 51 | |
| 52 | #if 0 |
| 53 | #define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ |
| 54 | #define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ |
| 55 | #define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ |
| 56 | #endif |
| 57 | |
| 58 | /* |
| 59 | * Size of malloc() pool |
| 60 | */ |
| 61 | |
| 62 | #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) |
| 63 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
| 64 | |
| 65 | /* |
| 66 | * CS8900 Ethernet drivers |
| 67 | */ |
| 68 | #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ |
| 69 | #define CS8900_BASE 0x15000300 |
| 70 | #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ |
| 71 | |
| 72 | /* |
| 73 | * select serial console configuration |
| 74 | */ |
| 75 | |
| 76 | #define CONFIG_UART1 1 |
| 77 | /* #define CONFIG_UART2 1 */ |
| 78 | |
| 79 | #define CONFIG_BAUDRATE 115200 |
| 80 | |
| 81 | /*********************************************************** |
| 82 | * Command definition |
| 83 | ***********************************************************/ |
| 84 | |
| 85 | #define CONFIG_COMMANDS \ |
| 86 | (CONFIG_CMD_DFL | \ |
| 87 | CFG_CMD_CACHE | \ |
| 88 | /*CFG_CMD_NAND |*/ \ |
| 89 | /*CFG_CMD_EEPROM |*/ \ |
| 90 | /*CFG_CMD_I2C |*/ \ |
| 91 | /*CFG_CMD_USB |*/ \ |
| 92 | CFG_CMD_REGINFO | \ |
| 93 | CFG_CMD_ELF) |
| 94 | |
| 95 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
| 96 | #include <cmd_confdefs.h> |
| 97 | |
| 98 | #define CONFIG_BOOTDELAY 3 |
| 99 | #define CONFIG_BOOTARGS "root=/dev/docbp mem=48M" |
| 100 | #define CONFIG_ETHADDR 08:00:3e:26:0a:5c |
| 101 | #define CONFIG_NETMASK 255.255.255.0 |
| 102 | #define CONFIG_IPADDR 192.168.0.22 |
| 103 | #define CONFIG_SERVERIP 192.168.0.11 |
| 104 | #define CONFIG_BOOTFILE "mx1ads" |
| 105 | /*#define CONFIG_BOOTCOMMAND "tftp; bootm" */ |
| 106 | |
| 107 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
| 108 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
| 109 | /* what's this ? it's not used anywhere */ |
| 110 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ |
| 111 | #endif |
| 112 | |
| 113 | /* |
| 114 | * Miscellaneous configurable options |
| 115 | */ |
| 116 | |
| 117 | #define CFG_HUSH_PARSER 1 |
| 118 | #define CFG_PROMPT_HUSH_PS2 "> " |
| 119 | |
| 120 | #define CFG_LONGHELP /* undef to save memory */ |
| 121 | |
| 122 | #ifdef CFG_HUSH_PARSER |
| 123 | #define CFG_PROMPT "MX1ADS$ " /* Monitor Command Prompt */ |
| 124 | #else |
| 125 | #define CFG_PROMPT "MX1ADS=> " /* Monitor Command Prompt */ |
| 126 | #endif |
| 127 | |
| 128 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
| 129 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) |
| 130 | /* Print Buffer Size */ |
| 131 | #define CFG_MAXARGS 16 /* max number of command args */ |
| 132 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
| 133 | |
| 134 | #define CFG_MEMTEST_START 0x09000000 /* memtest works on */ |
| 135 | #define CFG_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ |
| 136 | |
| 137 | #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
| 138 | |
| 139 | #define CFG_LOAD_ADDR 0x08800000 /* default load address */ |
| 140 | |
| 141 | |
| 142 | #define CFG_HZ 1000 |
| 143 | |
| 144 | /* valid baudrates */ |
| 145 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| 146 | |
| 147 | /*----------------------------------------------------------------------- |
| 148 | * Stack sizes |
| 149 | * |
| 150 | * The stack sizes are set up in start.S using the settings below |
| 151 | */ |
| 152 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 153 | #ifdef CONFIG_USE_IRQ |
| 154 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 155 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 156 | #endif |
| 157 | |
| 158 | /*----------------------------------------------------------------------- |
| 159 | * Physical Memory Map |
| 160 | */ |
| 161 | |
| 162 | |
| 163 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ |
| 164 | #define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */ |
| 165 | #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ |
| 166 | |
| 167 | #define CFG_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */ |
| 168 | #define CFG_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */ |
| 169 | #define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */ |
| 170 | |
| 171 | |
| 172 | /*----------------------------------------------------------------------- |
| 173 | * FLASH and environment organization |
| 174 | */ |
| 175 | |
| 176 | |
| 177 | #define CONFIG_SYNCFLASH 1 |
| 178 | #define PHYS_FLASH_SIZE 0x01000000 |
| 179 | #define CFG_MAX_FLASH_SECT (16) |
| 180 | #define CFG_ENV_ADDR (CFG_FLASH_BASE+0x00ff0000) |
| 181 | |
| 182 | #define CFG_ENV_IS_IN_FLASH 1 |
| 183 | #define CFG_ENV_SIZE 0x0f000 /* Total Size of Environment Sector */ |
| 184 | #define CFG_ENV_SECT_SIZE 0x100000 |
| 185 | #endif /* __CONFIG_H */ |