Simon Glass | 74749f1 | 2019-12-06 21:42:53 -0700 | [diff] [blame] | 1 | * Intel Apollo Lake pin controller |
| 2 | |
| 3 | The Apollo Lake (APL) pin controller is used to select the function of a pin |
| 4 | and to configure it. |
| 5 | |
| 6 | Required properties: |
| 7 | - compatible: "intel,apl-pinctrl" |
| 8 | - intel,p2sb-port-id: Port ID number within the parent P2SB |
| 9 | - reg: PCI address of the controller |
| 10 | |
| 11 | Please refer to pinctrl-bindings.txt in this directory for details of the |
| 12 | common pinctrl bindings used by client devices. |
| 13 | |
| 14 | Optional subnodes: |
| 15 | |
| 16 | GPIO nodes may be added as children of the pinctrl nodes. See intel,apl-gpio |
| 17 | for the binding. |
| 18 | |
| 19 | |
| 20 | Example: |
| 21 | |
| 22 | ... |
| 23 | { |
| 24 | p2sb: p2sb@d,0 { |
| 25 | reg = <0x02006810 0 0 0 0>; |
Wolfgang Wallner | 5a9d7f9 | 2020-02-18 15:32:10 +0100 | [diff] [blame] | 26 | compatible = "intel,p2sb"; |
Simon Glass | 74749f1 | 2019-12-06 21:42:53 -0700 | [diff] [blame] | 27 | early-regs = <IOMAP_P2SB_BAR 0x100000>; |
| 28 | |
| 29 | n { |
| 30 | compatible = "intel,apl-pinctrl"; |
| 31 | intel,p2sb-port-id = <PID_GPIO_N>; |
| 32 | gpio_n: gpio-n { |
| 33 | compatible = "intel,apl-gpio"; |
| 34 | #gpio-cells = <2>; |
| 35 | }; |
| 36 | }; |
| 37 | }; |
| 38 | }; |
| 39 | ... |