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wdenk2d5b5612003-10-14 19:43:55 +00001/*
2 * (C) Copyright 2003
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * Configuation settings for the IXDP425 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * High Level Configuration Options
31 * (easy to change)
32 */
33#define CONFIG_IXP425 1 /* This is an IXP425 CPU */
34#define CONFIG_IXDP425 1 /* on an IXDP425 Board */
35
36/***************************************************************
37 * U-boot generic defines start here.
38 ***************************************************************/
39
40/*
41 * If we are developing, we might want to start armboot from ram
42 * so we MUST NOT initialize critical regs like mem-timing ...
43 */
44#define CONFIG_INIT_CRITICAL /* undef for developing */
45
46#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
47
48/*
49 * Size of malloc() pool
50 */
51#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
52
53/* allow to overwrite serial and ethaddr */
54#define CONFIG_ENV_OVERWRITE
55
56#define CONFIG_BAUDRATE 115200
57
58#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET)
59
60/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
61/* These are u-boot generic parameters */
62#include <cmd_confdefs.h>
63
64#define CONFIG_BOOTDELAY 3
65#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
66#define CONFIG_NETMASK 255.255.0.0
67#define CONFIG_IPADDR 192.168.0.21
68#define CONFIG_SERVERIP 192.168.0.250
69#define CONFIG_BOOTCOMMAND "bootm 50040000"
70#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
71#define CONFIG_CMDLINE_TAG
72
73#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
74#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
75#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
76#endif
77
78/*
79 * Miscellaneous configurable options
80 */
81#define CFG_LONGHELP /* undef to save memory */
82#define CFG_PROMPT "=> " /* Monitor Command Prompt */
83#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
84#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
85#define CFG_MAXARGS 16 /* max number of command args */
86#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
87
88#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
89#define CFG_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
90
91#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
92
93#define CFG_LOAD_ADDR 0x00010000 /* default load address */
94
95#define CFG_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */
96 /* valid baudrates */
97#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
98
99/*
100 * Stack sizes
101 *
102 * The stack sizes are set up in start.S using the settings below
103 */
104#define CONFIG_STACKSIZE (128*1024) /* regular stack */
105#ifdef CONFIG_USE_IRQ
106#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
107#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
108#endif
109
110/***************************************************************
111 * Platform/Board specific defines start here.
112 ***************************************************************/
113
114/*
115 * Hardware drivers
116 */
117
118
119/*
120 * select serial console configuration
121 */
122#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
123
124/*
125 * Physical Memory Map
126 */
127#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
128#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
129#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
130
131#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
132#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
133#define PHYS_FLASH_BANK_SIZE 0x00800000 /* 8 MB Banks */
134#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
135
136#define CFG_DRAM_BASE 0x00000000
137#define CFG_DRAM_SIZE 0x01000000
138
139#define CFG_FLASH_BASE PHYS_FLASH_1
140
141/*
142 * Expansion bus settings
143 */
144#define CFG_EXP_CS0 0xbcd23c42
145
146/*
147 * SDRAM settings
148 */
149#define CFG_SDR_CONFIG 0xd
150#define CFG_SDRAM_REFRESH_CNT 0x81a
151
152/*
153 * GPIO settings
154 */
155
156/*
157 * FLASH and environment organization
158 */
159#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
160#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
161
162/* timeout values are in ticks */
163#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
164#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
165
166/* FIXME */
167#define CFG_ENV_IS_IN_FLASH 1
168#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
169#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
170
171#endif /* __CONFIG_H */