| Meenakshi Aggarwal | 9ed303d | 2020-12-04 20:17:28 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
| 2 | /* |
| 3 | * NXP LX2162AQDS device tree source for the SERDES block #1 - protocol 17 |
| 4 | * |
| 5 | * Some assumptions are made: |
| 6 | * * mezzanine card M8 is connected to IO SLOT1 (25g-aui for DPMAC 3,4,5,6) |
| 7 | * |
| Yangbo Lu | 38d1a18 | 2021-05-14 10:33:57 +0800 | [diff] [blame] | 8 | * Copyright 2020-2021 NXP |
| Meenakshi Aggarwal | 9ed303d | 2020-12-04 20:17:28 +0530 | [diff] [blame] | 9 | * |
| 10 | */ |
| 11 | |
| 12 | #include "fsl-lx2160a-qds.dtsi" |
| 13 | |
| 14 | &dpmac3 { |
| 15 | status = "okay"; |
| 16 | phy-handle = <&inphi_phy0>; |
| 17 | phy-connection-type = "25g-aui"; |
| 18 | }; |
| 19 | |
| 20 | &dpmac4 { |
| 21 | status = "okay"; |
| 22 | phy-handle = <&inphi_phy1>; |
| 23 | phy-connection-type = "25g-aui"; |
| 24 | }; |
| 25 | |
| 26 | &dpmac5 { |
| 27 | status = "okay"; |
| 28 | phy-handle = <&inphi_phy2>; |
| 29 | phy-connection-type = "25g-aui"; |
| 30 | }; |
| 31 | |
| 32 | &dpmac6 { |
| 33 | status = "okay"; |
| 34 | phy-handle = <&inphi_phy3>; |
| 35 | phy-connection-type = "25g-aui"; |
| 36 | }; |
| 37 | |
| 38 | &emdio1_slot1 { |
| 39 | inphi_phy0: ethernet-phy@0 { |
| 40 | compatible = "ethernet-phy-id0210.7440"; |
| 41 | reg = <0x0>; |
| 42 | }; |
| 43 | |
| 44 | inphi_phy1: ethernet-phy@1 { |
| 45 | compatible = "ethernet-phy-id0210.7440"; |
| 46 | reg = <0x1>; |
| 47 | }; |
| 48 | |
| 49 | inphi_phy2: ethernet-phy@2 { |
| 50 | compatible = "ethernet-phy-id0210.7440"; |
| 51 | reg = <0x2>; |
| 52 | }; |
| 53 | |
| 54 | inphi_phy3: ethernet-phy@3 { |
| 55 | compatible = "ethernet-phy-id0210.7440"; |
| 56 | reg = <0x3>; |
| 57 | }; |
| 58 | }; |
| Yangbo Lu | 38d1a18 | 2021-05-14 10:33:57 +0800 | [diff] [blame] | 59 | |
| 60 | &esdhc1 { |
| 61 | mmc-hs200-1_8v; |
| 62 | mmc-hs400-1_8v; |
| 63 | bus-width = <8>; |
| 64 | }; |