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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 2e91e2025c1bb5ab3769aa21677c423aefb2c0ea / . / configs / evb-px5_defconfig
blob: 46a42a7df696aca42dc2c48d3b78ad37ef7bda8a [file] [log] [blame]
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00200000
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]4CONFIG_ROCKCHIP_RK3368=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]5CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
6CONFIG_TPL_LIBCOMMON_SUPPORT=y
7CONFIG_TPL_LIBGENERIC_SUPPORT=y
8CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Tom Rinidf33f862019-08-14 08:11:27 -0400[diff] [blame]9CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]10CONFIG_TARGET_EVB_PX5=y
Tom Rinid168bcb2019-04-29 15:54:04 -0400[diff] [blame]11CONFIG_NR_DRAM_BANKS=1
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]12CONFIG_SPL_STACK_R_ADDR=0x600000
13CONFIG_SPL=y
Tom Rini358b6a22018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BASE=0xFF1c0000
15CONFIG_DEBUG_UART_CLOCK=24000000
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]16CONFIG_SPL_SPI_FLASH_SUPPORT=y
17CONFIG_SPL_SPI_SUPPORT=y
Tom Rinifb82fe32017-06-19 09:47:40 -0400[diff] [blame]18CONFIG_DEBUG_UART=y
Tom Rinidf35f452017-09-08 10:14:49 -0400[diff] [blame]19CONFIG_ANDROID_BOOT_IMAGE=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]20CONFIG_FIT=y
21CONFIG_FIT_VERBOSE=y
22CONFIG_SPL_LOAD_FIT=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]23CONFIG_BOOTSTAGE=y
24CONFIG_SPL_BOOTSTAGE=y
25CONFIG_BOOTSTAGE_REPORT=y
26CONFIG_BOOTSTAGE_FDT=y
Klaus Gogera2a50532018-05-25 23:45:05 +0200[diff] [blame]27CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-px5-evb.dtb"
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]28# CONFIG_DISPLAY_CPUINFO is not set
Mario Six78eba692018-03-28 14:38:17 +0200[diff] [blame]29CONFIG_DISPLAY_BOARDINFO_LATE=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]30CONFIG_ARCH_EARLY_INIT_R=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]31CONFIG_SPL_BOOTROM_SUPPORT=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]32CONFIG_TPL_SYS_MALLOC_SIMPLE=y
33CONFIG_SPL_STACK_R=y
34CONFIG_SPL_ATF=y
35CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
36CONFIG_TPL=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]37CONFIG_CMD_MMC=y
38CONFIG_CMD_CACHE=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]39CONFIG_SPL_OF_CONTROL=y
40CONFIG_TPL_OF_CONTROL=y
41CONFIG_OF_LIVE=y
Tom Rini8c5cad02018-09-03 15:26:12 -0400[diff] [blame]42CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb"
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]43CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
44CONFIG_TPL_OF_PLATDATA=y
45CONFIG_ENV_IS_IN_MMC=y
46CONFIG_NET_RANDOM_ETHADDR=y
47CONFIG_TPL_DM=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]48CONFIG_REGMAP=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]49CONFIG_SPL_REGMAP=y
50CONFIG_TPL_REGMAP=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]51CONFIG_SYSCON=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]52CONFIG_SPL_SYSCON=y
53CONFIG_TPL_SYSCON=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]54CONFIG_CLK=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]55CONFIG_SPL_CLK=y
56CONFIG_TPL_CLK=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]57CONFIG_MMC_DW=y
58CONFIG_MMC_DW_ROCKCHIP=y
59CONFIG_PINCTRL=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]60CONFIG_SPL_PINCTRL=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]61CONFIG_RAM=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]62CONFIG_SPL_RAM=y
63CONFIG_TPL_RAM=y
64CONFIG_DM_RESET=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]65CONFIG_DEBUG_UART_SHIFT=2
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]66CONFIG_DEBUG_UART_SKIP_INIT=y
67CONFIG_SYSRESET=y
Kever Yang259afb12019-02-12 15:19:07 +0800[diff] [blame]68CONFIG_PANIC_HANG=y
69CONFIG_SPL_TINY_MEMSET=y
70CONFIG_TPL_TINY_MEMSET=y
Andy Yan9d7ed332017-05-15 17:54:48 +0800[diff] [blame]71CONFIG_ERRNO_STR=y