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wdenk0db5bca2003-03-31 17:27:09 +00001/*
2 * (C) Copyright 2003
3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk0db5bca2003-03-31 17:27:09 +00006 */
7
8/*
9 * File: speed.c
wdenk8bde7f72003-06-27 21:31:46 +000010 *
wdenk0db5bca2003-03-31 17:27:09 +000011 * Discription: Provides cpu speed calculation
wdenk8bde7f72003-06-27 21:31:46 +000012 *
wdenk0db5bca2003-03-31 17:27:09 +000013 */
14
15#include <common.h>
16#include <mpc5xx.h>
17#include <asm/processor.h>
18
Wolfgang Denkd87080b2006-03-31 18:32:53 +020019DECLARE_GLOBAL_DATA_PTR;
20
wdenk0db5bca2003-03-31 17:27:09 +000021/*
22 * Get cpu and bus clock
23 */
24int get_clocks (void)
25{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020026 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +000027
28#ifndef CONFIG_5xx_GCLK_FREQ
29 uint divf = (immr->im_clkrst.car_plprcr & PLPRCR_DIVF_MSK);
30 uint mf = ((immr->im_clkrst.car_plprcr & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT);
31 ulong vcoout;
32
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033 vcoout = (CONFIG_SYS_OSC_CLK / (divf + 1)) * (mf + 1) * 2;
wdenk0db5bca2003-03-31 17:27:09 +000034 if(immr->im_clkrst.car_plprcr & PLPRCR_CSRC_MSK) {
35 gd->cpu_clk = vcoout / (2^(((immr->im_clkrst.car_sccr & SCCR_DFNL_MSK) >> SCCR_DFNL_SHIFT) + 1));
36 } else {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020037 gd->cpu_clk = vcoout / (2^(immr->im_clkrst.car_sccr & SCCR_DFNH_MSK));
38 }
wdenk8bde7f72003-06-27 21:31:46 +000039
wdenk0db5bca2003-03-31 17:27:09 +000040#else /* CONFIG_5xx_GCLK_FREQ */
41 gd->bus_clk = CONFIG_5xx_GCLK_FREQ;
42#endif /* CONFIG_5xx_GCLK_FREQ */
43
44 if ((immr->im_clkrst.car_sccr & SCCR_EBDF11) == 0) {
45 /* No Bus Divider active */
46 gd->bus_clk = gd->cpu_clk;
47 } else {
48 /* CLKOUT is GCLK / 2 */
49 gd->bus_clk = gd->cpu_clk / 2;
50 }
51 return (0);
52}