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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassa8cb4fb2015-08-30 16:55:37 -06002/*
3 * Copyright (c) 2013 Google, Inc
Simon Glassa8cb4fb2015-08-30 16:55:37 -06004 */
5
6#include <common.h>
7#include <clk.h>
8#include <dm.h>
Simon Glassbfeb4432016-07-04 11:58:27 -06009#include <dt-structs.h>
Simon Glassa8cb4fb2015-08-30 16:55:37 -060010#include <dwmmc.h>
11#include <errno.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
Simon Glassbfeb4432016-07-04 11:58:27 -060013#include <mapmem.h>
Simon Glasse1efec42016-01-21 19:43:34 -070014#include <pwrseq.h>
Simon Glassa8cb4fb2015-08-30 16:55:37 -060015#include <syscon.h>
Simon Glasse1efec42016-01-21 19:43:34 -070016#include <asm/gpio.h>
Kever Yang15f09a12019-03-28 11:01:23 +080017#include <asm/arch-rockchip/clock.h>
18#include <asm/arch-rockchip/periph.h>
Simon Glassc05ed002020-05-10 11:40:11 -060019#include <linux/delay.h>
Simon Glassa8cb4fb2015-08-30 16:55:37 -060020#include <linux/err.h>
21
Simon Glassf6e41d12016-05-14 14:03:08 -060022struct rockchip_mmc_plat {
Simon Glassbfeb4432016-07-04 11:58:27 -060023#if CONFIG_IS_ENABLED(OF_PLATDATA)
24 struct dtd_rockchip_rk3288_dw_mshc dtplat;
25#endif
Simon Glassf6e41d12016-05-14 14:03:08 -060026 struct mmc_config cfg;
27 struct mmc mmc;
28};
29
Simon Glassa8cb4fb2015-08-30 16:55:37 -060030struct rockchip_dwmmc_priv {
Stephen Warren135aa952016-06-17 09:44:00 -060031 struct clk clk;
Simon Glassa8cb4fb2015-08-30 16:55:37 -060032 struct dwmci_host host;
Simon Glass6809b042016-07-04 11:58:26 -060033 int fifo_depth;
34 bool fifo_mode;
35 u32 minmax[2];
Simon Glassa8cb4fb2015-08-30 16:55:37 -060036};
37
38static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
39{
40 struct udevice *dev = host->priv;
41 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
42 int ret;
43
Stephen Warren135aa952016-06-17 09:44:00 -060044 ret = clk_set_rate(&priv->clk, freq);
Simon Glassa8cb4fb2015-08-30 16:55:37 -060045 if (ret < 0) {
Kever Yang419b0802017-06-14 16:31:49 +080046 debug("%s: err=%d\n", __func__, ret);
Simon Glassa8cb4fb2015-08-30 16:55:37 -060047 return ret;
48 }
49
50 return freq;
51}
52
Simon Glassd1998a92020-12-03 16:55:21 -070053static int rockchip_dwmmc_of_to_plat(struct udevice *dev)
Simon Glassa8cb4fb2015-08-30 16:55:37 -060054{
55 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
56 struct dwmci_host *host = &priv->host;
57
Simon Glassdcfc42b2021-08-07 07:24:06 -060058 if (!CONFIG_IS_ENABLED(OF_REAL))
59 return 0;
60
Simon Glassa8cb4fb2015-08-30 16:55:37 -060061 host->name = dev->name;
Philipp Tomsichbe5f04e2017-09-11 22:04:15 +020062 host->ioaddr = dev_read_addr_ptr(dev);
Philipp Tomsichfd1bf8d2017-06-07 18:46:00 +020063 host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
Simon Glassa8cb4fb2015-08-30 16:55:37 -060064 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
65 host->priv = dev;
66
huang linace21982015-11-18 09:37:25 +080067 /* use non-removeable as sdcard and emmc as judgement */
Philipp Tomsichfd1bf8d2017-06-07 18:46:00 +020068 if (dev_read_bool(dev, "non-removable"))
huang lin65793852016-01-08 14:06:49 +080069 host->dev_index = 0;
70 else
huang linace21982015-11-18 09:37:25 +080071 host->dev_index = 1;
Simon Glassa8cb4fb2015-08-30 16:55:37 -060072
Philipp Tomsichfd1bf8d2017-06-07 18:46:00 +020073 priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
74
Simon Glass6809b042016-07-04 11:58:26 -060075 if (priv->fifo_depth < 0)
76 return -EINVAL;
Philipp Tomsichfd1bf8d2017-06-07 18:46:00 +020077 priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
Philipp Tomsichff71f9a2017-04-25 09:52:07 +020078
Heiko Stuebnerc8dd0e42019-11-19 12:04:01 +010079#ifdef CONFIG_SPL_BUILD
80 if (!priv->fifo_mode)
81 priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");
82#endif
83
Philipp Tomsichff71f9a2017-04-25 09:52:07 +020084 /*
85 * 'clock-freq-min-max' is deprecated
86 * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
87 */
Philipp Tomsichfd1bf8d2017-06-07 18:46:00 +020088 if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
89 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
Philipp Tomsichff71f9a2017-04-25 09:52:07 +020090
91 if (val < 0)
92 return val;
93
94 priv->minmax[0] = 400000; /* 400 kHz */
95 priv->minmax[1] = val;
96 } else {
97 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
98 __func__);
99 }
Simon Glassdcfc42b2021-08-07 07:24:06 -0600100
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600101 return 0;
102}
103
104static int rockchip_dwmmc_probe(struct udevice *dev)
105{
Simon Glassc69cda22020-12-03 16:55:20 -0700106 struct rockchip_mmc_plat *plat = dev_get_plat(dev);
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600107 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
108 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
109 struct dwmci_host *host = &priv->host;
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600110 int ret;
111
Simon Glassbfeb4432016-07-04 11:58:27 -0600112#if CONFIG_IS_ENABLED(OF_PLATDATA)
113 struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
114
115 host->name = dev->name;
116 host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
117 host->buswidth = dtplat->bus_width;
118 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
119 host->priv = dev;
120 host->dev_index = 0;
121 priv->fifo_depth = dtplat->fifo_depth;
122 priv->fifo_mode = 0;
Kever Yang80935292017-06-14 16:31:46 +0800123 priv->minmax[0] = 400000; /* 400 kHz */
124 priv->minmax[1] = dtplat->max_frequency;
Simon Glassbfeb4432016-07-04 11:58:27 -0600125
Simon Glassf0ab8f92021-08-07 07:24:09 -0600126 ret = clk_get_by_phandle(dev, dtplat->clocks, &priv->clk);
Simon Glassbfeb4432016-07-04 11:58:27 -0600127 if (ret < 0)
128 return ret;
129#else
Kever Yang419b0802017-06-14 16:31:49 +0800130 ret = clk_get_by_index(dev, 0, &priv->clk);
Simon Glass898d6432016-01-21 19:43:38 -0700131 if (ret < 0)
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600132 return ret;
Simon Glassbfeb4432016-07-04 11:58:27 -0600133#endif
huang lin28637242015-11-17 14:20:24 +0800134 host->fifoth_val = MSIZE(0x2) |
Simon Glass6809b042016-07-04 11:58:26 -0600135 RX_WMARK(priv->fifo_depth / 2 - 1) |
136 TX_WMARK(priv->fifo_depth / 2);
huang lin28637242015-11-17 14:20:24 +0800137
Simon Glass6809b042016-07-04 11:58:26 -0600138 host->fifo_mode = priv->fifo_mode;
huang lin28637242015-11-17 14:20:24 +0800139
Jaehoon Chung9d7e6612021-02-16 10:16:54 +0900140#ifdef CONFIG_MMC_PWRSEQ
Simon Glasse1efec42016-01-21 19:43:34 -0700141 /* Enable power if needed */
Jaehoon Chung9d7e6612021-02-16 10:16:54 +0900142 ret = mmc_pwrseq_get_power(dev, &plat->cfg);
Simon Glasse1efec42016-01-21 19:43:34 -0700143 if (!ret) {
Jaehoon Chung9d7e6612021-02-16 10:16:54 +0900144 ret = pwrseq_set_power(plat->cfg.pwr_dev, true);
Simon Glasse1efec42016-01-21 19:43:34 -0700145 if (ret)
146 return ret;
147 }
148#endif
Jaehoon Chunge5113c32016-09-23 19:13:16 +0900149 dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
Simon Glassf6e41d12016-05-14 14:03:08 -0600150 host->mmc = &plat->mmc;
Simon Glassf6e41d12016-05-14 14:03:08 -0600151 host->mmc->priv = &priv->host;
Simon Glasscffe5d82016-05-01 13:52:34 -0600152 host->mmc->dev = dev;
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600153 upriv->mmc = host->mmc;
154
Simon Glass42b37d82016-06-12 23:30:24 -0600155 return dwmci_probe(dev);
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600156}
157
Simon Glassf6e41d12016-05-14 14:03:08 -0600158static int rockchip_dwmmc_bind(struct udevice *dev)
159{
Simon Glassc69cda22020-12-03 16:55:20 -0700160 struct rockchip_mmc_plat *plat = dev_get_plat(dev);
Simon Glassf6e41d12016-05-14 14:03:08 -0600161
Masahiro Yamada24f5aec2016-09-06 22:17:32 +0900162 return dwmci_bind(dev, &plat->mmc, &plat->cfg);
Simon Glassf6e41d12016-05-14 14:03:08 -0600163}
164
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600165static const struct udevice_id rockchip_dwmmc_ids[] = {
Heiko Stuebner26a52f32018-09-21 10:59:46 +0200166 { .compatible = "rockchip,rk2928-dw-mshc" },
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600167 { .compatible = "rockchip,rk3288-dw-mshc" },
168 { }
169};
170
Walter Lozanoe3e24702020-06-25 01:10:04 -0300171U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = {
Simon Glassbfeb4432016-07-04 11:58:27 -0600172 .name = "rockchip_rk3288_dw_mshc",
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600173 .id = UCLASS_MMC,
174 .of_match = rockchip_dwmmc_ids,
Simon Glassd1998a92020-12-03 16:55:21 -0700175 .of_to_plat = rockchip_dwmmc_of_to_plat,
Simon Glass42b37d82016-06-12 23:30:24 -0600176 .ops = &dm_dwmci_ops,
Simon Glassf6e41d12016-05-14 14:03:08 -0600177 .bind = rockchip_dwmmc_bind,
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600178 .probe = rockchip_dwmmc_probe,
Simon Glass41575d82020-12-03 16:55:17 -0700179 .priv_auto = sizeof(struct rockchip_dwmmc_priv),
Simon Glasscaa4daa2020-12-03 16:55:18 -0700180 .plat_auto = sizeof(struct rockchip_mmc_plat),
Simon Glassa8cb4fb2015-08-30 16:55:37 -0600181};
Simon Glasse1efec42016-01-21 19:43:34 -0700182
Simon Glassbdf8fd72020-12-28 20:34:57 -0700183DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc)
184DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc)