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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Christian Riesch32b11272011-12-09 09:47:35 +00002/*
3 * Copyright (C) 2011 OMICRON electronics GmbH
4 *
Miquel Raynala430fa02018-08-16 17:30:07 +02005 * based on drivers/mtd/nand/raw/nand_spl_load.c
Christian Riesch32b11272011-12-09 09:47:35 +00006 *
7 * Copyright (C) 2011
8 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
Christian Riesch32b11272011-12-09 09:47:35 +00009 */
10
11#include <common.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060012#include <image.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060013#include <log.h>
Simon Glassff0960f2014-10-13 23:42:04 -060014#include <spi.h>
Christian Riesch32b11272011-12-09 09:47:35 +000015#include <spi_flash.h>
Nikita Kiryanov36afd452015-11-08 17:11:49 +020016#include <errno.h>
Tom Rinia4cc1c42012-08-14 14:34:10 -070017#include <spl.h>
Christian Riesch32b11272011-12-09 09:47:35 +000018
Philipp Tomsich2bac55b2017-04-17 17:45:11 +020019DECLARE_GLOBAL_DATA_PTR;
20
Tom Rinifa1a73f2014-04-03 07:52:55 -040021#ifdef CONFIG_SPL_OS_BOOT
22/*
23 * Load the kernel, check for a valid header we can parse, and if found load
24 * the kernel and then device tree.
25 */
Simon Glass2a2ee2a2016-09-24 18:20:13 -060026static int spi_load_image_os(struct spl_image_info *spl_image,
27 struct spi_flash *flash,
Tom Rinifa1a73f2014-04-03 07:52:55 -040028 struct image_header *header)
29{
Marek Vasut7e0f2262016-04-29 00:44:54 +020030 int err;
31
Tom Rinifa1a73f2014-04-03 07:52:55 -040032 /* Read for a header, parse or error out. */
Michal Simek51c12312018-10-04 09:30:20 +020033 spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header),
Tom Rinifa1a73f2014-04-03 07:52:55 -040034 (void *)header);
35
36 if (image_get_magic(header) != IH_MAGIC)
37 return -1;
38
Simon Glass2a2ee2a2016-09-24 18:20:13 -060039 err = spl_parse_image_header(spl_image, header);
Marek Vasut7e0f2262016-04-29 00:44:54 +020040 if (err)
41 return err;
Tom Rinifa1a73f2014-04-03 07:52:55 -040042
43 spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS,
Simon Glass2a2ee2a2016-09-24 18:20:13 -060044 spl_image->size, (void *)spl_image->load_addr);
Tom Rinifa1a73f2014-04-03 07:52:55 -040045
46 /* Read device tree. */
47 spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
48 CONFIG_SYS_SPI_ARGS_SIZE,
49 (void *)CONFIG_SYS_SPL_ARGS_ADDR);
50
51 return 0;
52}
53#endif
54
Lokesh Vutla00d55952016-05-24 10:34:40 +053055static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
56 ulong count, void *buf)
57{
58 struct spi_flash *flash = load->dev;
59 ulong ret;
60
61 ret = spi_flash_read(flash, sector, count, buf);
62 if (!ret)
63 return count;
64 else
65 return 0;
66}
Peng Fanec649332019-09-23 10:18:41 +080067
68unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash)
69{
70 return CONFIG_SYS_SPI_U_BOOT_OFFS;
71}
72
Christian Riesch32b11272011-12-09 09:47:35 +000073/*
74 * The main entry for SPI booting. It's necessary that SDRAM is already
75 * configured and available since this code loads the main U-Boot image
76 * from SPI into SDRAM and starts it from there.
77 */
Simon Glass2a2ee2a2016-09-24 18:20:13 -060078static int spl_spi_load_image(struct spl_image_info *spl_image,
79 struct spl_boot_device *bootdev)
Christian Riesch32b11272011-12-09 09:47:35 +000080{
Nikita Kiryanov36afd452015-11-08 17:11:49 +020081 int err = 0;
Peng Fanec649332019-09-23 10:18:41 +080082 unsigned int payload_offs;
Christian Riesch32b11272011-12-09 09:47:35 +000083 struct spi_flash *flash;
Tom Rinia4cc1c42012-08-14 14:34:10 -070084 struct image_header *header;
Christian Riesch32b11272011-12-09 09:47:35 +000085
86 /*
87 * Load U-Boot image from SPI flash into RAM
Patrick Delaunayb0cc1b82019-02-27 15:36:44 +010088 * In DM mode: defaults speed and mode will be
89 * taken from DT when available
Christian Riesch32b11272011-12-09 09:47:35 +000090 */
91
Nikita Kiryanov88e34e52014-08-20 15:08:48 +030092 flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
93 CONFIG_SF_DEFAULT_CS,
94 CONFIG_SF_DEFAULT_SPEED,
95 CONFIG_SF_DEFAULT_MODE);
Christian Riesch32b11272011-12-09 09:47:35 +000096 if (!flash) {
Tom Rinia4cc1c42012-08-14 14:34:10 -070097 puts("SPI probe failed.\n");
Nikita Kiryanov36afd452015-11-08 17:11:49 +020098 return -ENODEV;
Christian Riesch32b11272011-12-09 09:47:35 +000099 }
100
Peng Fanec649332019-09-23 10:18:41 +0800101 payload_offs = spl_spi_get_uboot_offs(flash);
102
Michal Simek51c12312018-10-04 09:30:20 +0200103 header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
Christian Riesch32b11272011-12-09 09:47:35 +0000104
Philipp Tomsich2bac55b2017-04-17 17:45:11 +0200105#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
106 payload_offs = fdtdec_get_config_int(gd->fdt_blob,
107 "u-boot,spl-payload-offset",
108 payload_offs);
109#endif
110
Tom Rinifa1a73f2014-04-03 07:52:55 -0400111#ifdef CONFIG_SPL_OS_BOOT
Simon Glass2a2ee2a2016-09-24 18:20:13 -0600112 if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header))
Tom Rinifa1a73f2014-04-03 07:52:55 -0400113#endif
114 {
115 /* Load u-boot, mkimage header is 64 bytes. */
Michal Simek51c12312018-10-04 09:30:20 +0200116 err = spi_flash_read(flash, payload_offs, sizeof(*header),
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200117 (void *)header);
Simon Glassa7044902017-01-16 07:03:27 -0700118 if (err) {
119 debug("%s: Failed to read from SPI flash (err=%d)\n",
120 __func__, err);
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200121 return err;
Simon Glassa7044902017-01-16 07:03:27 -0700122 }
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200123
Marek Vasut26ad6482018-05-31 17:59:29 +0200124 if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
125 image_get_magic(header) == FDT_MAGIC) {
126 err = spi_flash_read(flash, payload_offs,
127 roundup(fdt_totalsize(header), 4),
128 (void *)CONFIG_SYS_LOAD_ADDR);
129 if (err)
130 return err;
131 err = spl_parse_image_header(spl_image,
132 (struct image_header *)CONFIG_SYS_LOAD_ADDR);
133 } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
134 image_get_magic(header) == FDT_MAGIC) {
Lokesh Vutla00d55952016-05-24 10:34:40 +0530135 struct spl_load_info load;
136
137 debug("Found FIT\n");
138 load.dev = flash;
139 load.priv = NULL;
140 load.filename = NULL;
141 load.bl_len = 1;
142 load.read = spl_spi_fit_read;
Simon Glassf4d7d852016-09-24 18:20:16 -0600143 err = spl_load_simple_fit(spl_image, &load,
Philipp Tomsich2bac55b2017-04-17 17:45:11 +0200144 payload_offs,
Lokesh Vutla00d55952016-05-24 10:34:40 +0530145 header);
Peng Fand9bd2f42019-09-23 10:18:47 +0800146 } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
147 struct spl_load_info load;
148
149 load.dev = flash;
150 load.priv = NULL;
151 load.filename = NULL;
152 load.bl_len = 1;
153 load.read = spl_spi_fit_read;
154
155 err = spl_load_imx_container(spl_image, &load,
156 payload_offs);
Lokesh Vutla00d55952016-05-24 10:34:40 +0530157 } else {
Simon Glass2a2ee2a2016-09-24 18:20:13 -0600158 err = spl_parse_image_header(spl_image, header);
Lokesh Vutla00d55952016-05-24 10:34:40 +0530159 if (err)
160 return err;
Philipp Tomsich2bac55b2017-04-17 17:45:11 +0200161 err = spi_flash_read(flash, payload_offs,
Simon Glass2a2ee2a2016-09-24 18:20:13 -0600162 spl_image->size,
163 (void *)spl_image->load_addr);
Lokesh Vutla00d55952016-05-24 10:34:40 +0530164 }
Tom Rinifa1a73f2014-04-03 07:52:55 -0400165 }
Nikita Kiryanov36afd452015-11-08 17:11:49 +0200166
167 return err;
Christian Riesch32b11272011-12-09 09:47:35 +0000168}
Simon Glass139db7a2016-09-24 18:20:09 -0600169/* Use priorty 1 so that boards can override this */
Simon Glassebc4ef62016-11-30 15:30:50 -0700170SPL_LOAD_IMAGE_METHOD("SPI", 1, BOOT_DEVICE_SPI, spl_spi_load_image);