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Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28/* High Level Configuration Options */
Chander Kashyape21185b2011-05-24 20:02:56 +000029#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
30#define CONFIG_S5P 1 /* S5P Family */
31#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */
32#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
33
34#include <asm/arch/cpu.h> /* get chip and board defs */
35
36#define CONFIG_ARCH_CPU_INIT
37#define CONFIG_DISPLAY_CPUINFO
38#define CONFIG_DISPLAY_BOARDINFO
39
40/* Keep L2 Cache Disabled */
41#define CONFIG_L2_OFF 1
42
43#define CONFIG_SYS_SDRAM_BASE 0x40000000
44#define CONFIG_SYS_TEXT_BASE 0x43E00000
45
46/* input clock of PLL: SMDKV310 has 24MHz input clock */
47#define CONFIG_SYS_CLK_FREQ 24000000
48
49#define CONFIG_SETUP_MEMORY_TAGS
50#define CONFIG_CMDLINE_TAG
51#define CONFIG_INITRD_TAG
52#define CONFIG_CMDLINE_EDITING
53
54/* Handling Sleep Mode*/
55#define S5P_CHECK_SLEEP 0x00000BAD
56#define S5P_CHECK_DIDLE 0xBAD00000
57
58/* Size of malloc() pool */
59#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
60
61/* select serial console configuration */
62#define CONFIG_SERIAL_MULTI 1
63#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
64#define CONFIG_BAUDRATE 115200
65#define S5PC210_DEFAULT_UART_OFFSET 0x010000
66
67/* SD/MMC configuration */
68#define CONFIG_GENERIC_MMC 1
69#define CONFIG_MMC 1
70#define CONFIG_S5P_MMC 1
71
72/* PWM */
73#define CONFIG_PWM 1
74
75/* allow to overwrite serial and ethaddr */
76#define CONFIG_ENV_OVERWRITE
77
78/* Command definition*/
79#include <config_cmd_default.h>
80
81#define CONFIG_CMD_PING
82#define CONFIG_CMD_ELF
83#define CONFIG_CMD_DHCP
84#define CONFIG_CMD_MMC
85#define CONFIG_CMD_NET
86#define CONFIG_CMD_FAT
87
88#define CONFIG_BOOTDELAY 3
89#define CONFIG_ZERO_BOOTDELAY_CHECK
90#define CONFIG_MMC_U_BOOT
91
92#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
93
94/* Miscellaneous configurable options */
95#define CONFIG_SYS_LONGHELP /* undef to save memory */
96#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
97#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
98#define CONFIG_SYS_PROMPT "SMDKV310 # "
99#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
100#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
101#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
102#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
103/* Boot Argument Buffer Size */
104#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
105/* memtest works on */
106#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
107#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
108#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
109
110#define CONFIG_SYS_HZ 1000
111
112/* valid baudrates */
113#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
114
115/* Stack sizes */
116#define CONFIG_STACKSIZE (256 << 10) /* 256KB */
117
118/* SMDKV310 has 4 bank of DRAM */
119#define CONFIG_NR_DRAM_BANKS 4
120#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
121#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
122#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
123#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
124#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
125#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
126#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
127#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
128#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
129
130/* FLASH and environment organization */
131#define CONFIG_SYS_NO_FLASH 1
132#undef CONFIG_CMD_IMLS
133#define CONFIG_IDENT_STRING " for SMDKC210/V310"
134
135#ifdef CONFIG_USE_IRQ
136#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
137#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
138#endif
139
140#define CONFIG_CLK_1000_400_200
141
142/* MIU (Memory Interleaving Unit) */
143#define CONFIG_MIU_2BIT_INTERLEAVED
144
145#define CONFIG_ENV_IS_IN_MMC 1
146#define CONFIG_SYS_MMC_ENV_DEV 0
147#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
148#define RESERVE_BLOCK_SIZE (512)
149#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
150#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
151#define CONFIG_DOS_PARTITION 1
152
153#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
154
155/* U-boot copy size from boot Media to DRAM.*/
156#define COPY_BL2_SIZE 0x80000
157#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
158#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
159
160/* Ethernet Controllor Driver */
161#ifdef CONFIG_CMD_NET
Chander Kashyape21185b2011-05-24 20:02:56 +0000162#define CONFIG_SMC911X
163#define CONFIG_SMC911X_BASE 0x5000000
164#define CONFIG_SMC911X_16_BIT
165#define CONFIG_ENV_SROM_BANK 1
166#endif /*CONFIG_CMD_NET*/
Thomas Abraham07407d92011-06-03 22:52:17 +0000167
168/* Enable devicetree support */
169#define CONFIG_OF_LIBFDT
Chander Kashyape21185b2011-05-24 20:02:56 +0000170#endif /* __CONFIG_H */