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Stelian Pop2118ebb2008-05-08 18:52:25 +02001/*
2 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Pop2118ebb2008-05-08 18:52:25 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Stelian Pop2118ebb2008-05-08 18:52:25 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Xu, Hong21d671d2011-08-01 03:56:53 +000014#include <asm/hardware.h>
15
16#define CONFIG_SYS_TEXT_BASE 0x21F00000
Jens Scharsig425de622010-02-03 22:45:42 +010017
Stelian Pop2118ebb2008-05-08 18:52:25 +020018/* ARM asynchronous clock */
Xu, Hong21d671d2011-08-01 03:56:53 +000019#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
21#define CONFIG_SYS_HZ 1000
Stelian Pop2118ebb2008-05-08 18:52:25 +020022
Xu, Hong21d671d2011-08-01 03:56:53 +000023#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
24
Jean-Christophe PLAGNIOL-VILLARDdc39ae92009-04-16 21:30:44 +020025#define CONFIG_ARCH_CPU_INIT
Stelian Pop2118ebb2008-05-08 18:52:25 +020026#define CONFIG_SKIP_LOWLEVEL_INIT
Xu, Hong21d671d2011-08-01 03:56:53 +000027#define CONFIG_BOARD_EARLY_INIT_F
Xu, Hong21d671d2011-08-01 03:56:53 +000028
29#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
30#define CONFIG_SETUP_MEMORY_TAGS 1
31#define CONFIG_INITRD_TAG 1
32
33#define CONFIG_DISPLAY_CPUINFO
34
Nicolas Ferref9129fe2013-02-20 00:16:24 +000035#define CONFIG_CMD_BOOTZ
Nicolas Ferre36873e72013-02-20 00:16:23 +000036#define CONFIG_OF_LIBFDT
37
Xu, Hong21d671d2011-08-01 03:56:53 +000038#define CONFIG_ATMEL_LEGACY
39#define CONFIG_AT91_GPIO 1
40#define CONFIG_AT91_GPIO_PULLUP 1
Stelian Pop2118ebb2008-05-08 18:52:25 +020041
42/*
43 * Hardware drivers
44 */
Xu, Hong21d671d2011-08-01 03:56:53 +000045
46/* serial console */
47#define CONFIG_ATMEL_USART
48#define CONFIG_USART_BASE ATMEL_BASE_DBGU
49#define CONFIG_USART_ID ATMEL_ID_SYS
50#define CONFIG_BAUDRATE 115200
Stelian Pop2118ebb2008-05-08 18:52:25 +020051
Stelian Pop761c70b2008-05-08 14:52:32 +020052/* LCD */
53#define CONFIG_LCD 1
54#define LCD_BPP LCD_COLOR8
55#define CONFIG_LCD_LOGO 1
56#undef LCD_TEST_PATTERN
57#define CONFIG_LCD_INFO 1
58#define CONFIG_LCD_INFO_BELOW_LOGO 1
Xu, Hong21d671d2011-08-01 03:56:53 +000059#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop761c70b2008-05-08 14:52:32 +020060#define CONFIG_ATMEL_LCD 1
61#define CONFIG_ATMEL_LCD_RGB565 1
Xu, Hong21d671d2011-08-01 03:56:53 +000062/* Let board_init_f handle the framebuffer allocation */
63#undef CONFIG_FB_ADDR
64#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
65
Stelian Pop761c70b2008-05-08 14:52:32 +020066
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010067/* LED */
68#define CONFIG_AT91_LED
69#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
70#define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
71#define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
72
Stelian Pop2118ebb2008-05-08 18:52:25 +020073#define CONFIG_BOOTDELAY 3
74
Stelian Pop2118ebb2008-05-08 18:52:25 +020075/*
76 * Command line configuration.
77 */
78#include <config_cmd_default.h>
79#undef CONFIG_CMD_BDI
Stelian Pop2118ebb2008-05-08 18:52:25 +020080#undef CONFIG_CMD_FPGA
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020081#undef CONFIG_CMD_IMI
Stelian Pop2118ebb2008-05-08 18:52:25 +020082#undef CONFIG_CMD_IMLS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020083#undef CONFIG_CMD_LOADS
Stelian Pop2118ebb2008-05-08 18:52:25 +020084#undef CONFIG_CMD_NET
Xu, Hong21d671d2011-08-01 03:56:53 +000085#undef CONFIG_CMD_NFS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020086#undef CONFIG_CMD_SOURCE
Stelian Pop2118ebb2008-05-08 18:52:25 +020087#undef CONFIG_CMD_USB
88
Xu, Hong21d671d2011-08-01 03:56:53 +000089#define CONFIG_CMD_NAND 1
Stelian Pop2118ebb2008-05-08 18:52:25 +020090
91/* SDRAM */
92#define CONFIG_NR_DRAM_BANKS 1
Xu, Hong21d671d2011-08-01 03:56:53 +000093#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
94#define CONFIG_SYS_SDRAM_SIZE 0x04000000
95
96#define CONFIG_SYS_INIT_SP_ADDR \
97 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
Stelian Pop2118ebb2008-05-08 18:52:25 +020098
99/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +0100100#define CONFIG_ATMEL_DATAFLASH_SPI
Xu, Hong21d671d2011-08-01 03:56:53 +0000101#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200102#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
103#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
104#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Xu, Hong21d671d2011-08-01 03:56:53 +0000105#define AT91_SPI_CLK 15000000
106#define DATAFLASH_TCSS (0x1a << 16)
107#define DATAFLASH_TCHS (0x1 << 24)
Stelian Pop2118ebb2008-05-08 18:52:25 +0200108
109/* NOR flash - not present */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#define CONFIG_SYS_NO_FLASH 1
Stelian Pop2118ebb2008-05-08 18:52:25 +0200111
112/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100113#ifdef CONFIG_CMD_NAND
114#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_MAX_NAND_DEVICE 1
Xu, Hong21d671d2011-08-01 03:56:53 +0000116#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100118/* our ALE is AD21 */
119#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
120/* our CLE is AD22 */
121#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
122#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
123#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
Wolfgang Denk2eb99ca2009-07-18 21:52:24 +0200124
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100125#endif
Stelian Pop2118ebb2008-05-08 18:52:25 +0200126
127/* Ethernet - not present */
128
129/* USB - not supported */
130
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop2118ebb2008-05-08 18:52:25 +0200132
Xu, Hong21d671d2011-08-01 03:56:53 +0000133#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop2118ebb2008-05-08 18:52:25 +0200135
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop2118ebb2008-05-08 18:52:25 +0200137
138/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200139#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200141#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200143#define CONFIG_ENV_SIZE 0x4200
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000144#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
Stelian Pop2118ebb2008-05-08 18:52:25 +0200145#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
146 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200147 "mtdparts=atmel_nand:-(root) "\
Stelian Pop2118ebb2008-05-08 18:52:25 +0200148 "rw rootfstype=jffs2"
149
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Pop2118ebb2008-05-08 18:52:25 +0200151
152/* bootstrap + u-boot + env + linux in nandflash */
Xu, Hong21d671d2011-08-01 03:56:53 +0000153#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200154#define CONFIG_ENV_OFFSET 0x60000
155#define CONFIG_ENV_OFFSET_REDUND 0x80000
156#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Pop2118ebb2008-05-08 18:52:25 +0200157#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
158#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
159 "root=/dev/mtdblock5 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200160 "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
Stelian Pop2118ebb2008-05-08 18:52:25 +0200161 "rw rootfstype=jffs2"
162
163#endif
164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_PROMPT "U-Boot> "
166#define CONFIG_SYS_CBSIZE 256
167#define CONFIG_SYS_MAXARGS 16
168#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
169#define CONFIG_SYS_LONGHELP 1
Xu, Hong21d671d2011-08-01 03:56:53 +0000170#define CONFIG_CMDLINE_EDITING 1
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000171#define CONFIG_AUTO_COMPLETE
Stelian Pop2118ebb2008-05-08 18:52:25 +0200172
Stelian Pop2118ebb2008-05-08 18:52:25 +0200173/*
174 * Size of malloc() pool
175 */
Xu, Hong21d671d2011-08-01 03:56:53 +0000176#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Pop2118ebb2008-05-08 18:52:25 +0200177
Stelian Pop2118ebb2008-05-08 18:52:25 +0200178#endif