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Dirk Behme9d0fc812009-01-28 21:39:57 +01001/*
2 * Configuration settings for the Gumstix Overo board.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Dirk Behme9d0fc812009-01-28 21:39:57 +01005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
Dirk Behme9d0fc812009-01-28 21:39:57 +01009
10/*
11 * High Level Configuration Options
12 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000013#define CONFIG_OMAP /* in a TI OMAP core */
14#define CONFIG_OMAP34XX /* which is a 34XX */
15#define CONFIG_OMAP3_OVERO /* working with overo */
Marek Vasut308252a2012-07-21 05:02:23 +000016#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053017#define CONFIG_OMAP_COMMON
Dirk Behme9d0fc812009-01-28 21:39:57 +010018
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000019#define CONFIG_SDRC /* The chip has SDRC controller */
Vaibhav Hiremathcae377b2010-06-07 15:20:34 -040020
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000021#include <asm/arch/cpu.h> /* get chip and board defs */
Dirk Behme9d0fc812009-01-28 21:39:57 +010022#include <asm/arch/omap3.h>
23
Sanjeev Premi6a6b62e2009-04-27 21:27:27 +053024/*
25 * Display CPU and Board information
26 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000027#define CONFIG_DISPLAY_CPUINFO
28#define CONFIG_DISPLAY_BOARDINFO
Sanjeev Premi6a6b62e2009-04-27 21:27:27 +053029
Dirk Behme9d0fc812009-01-28 21:39:57 +010030/* Clock Defines */
31#define V_OSCK 26000000 /* Clock output from T2 */
32#define V_SCLK (V_OSCK >> 1)
33
Dirk Behme9d0fc812009-01-28 21:39:57 +010034#define CONFIG_MISC_INIT_R
35
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000036#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37#define CONFIG_SETUP_MEMORY_TAGS
38#define CONFIG_INITRD_TAG
39#define CONFIG_REVISION_TAG
Dirk Behme9d0fc812009-01-28 21:39:57 +010040
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000041#define CONFIG_OF_LIBFDT
Grant Likely2fa8ca92011-03-28 09:59:07 +000042
Dirk Behme9d0fc812009-01-28 21:39:57 +010043/*
44 * Size of malloc() pool
45 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000046#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Dirk Behme9d0fc812009-01-28 21:39:57 +010047 /* Sector */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000048#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Dirk Behme9d0fc812009-01-28 21:39:57 +010049
50/*
51 * Hardware drivers
52 */
53
54/*
55 * NS16550 Configuration
56 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000057#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
Dirk Behme9d0fc812009-01-28 21:39:57 +010058
59#define CONFIG_SYS_NS16550
60#define CONFIG_SYS_NS16550_SERIAL
61#define CONFIG_SYS_NS16550_REG_SIZE (-4)
62#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
63
64/*
65 * select serial console configuration
66 */
67#define CONFIG_CONS_INDEX 3
68#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
69#define CONFIG_SERIAL3 3
70
71/* allow to overwrite serial and ethaddr */
72#define CONFIG_ENV_OVERWRITE
73#define CONFIG_BAUDRATE 115200
74#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
75 115200}
Andreas Müller0f8d3eb2012-01-04 15:26:21 +000076#define CONFIG_GENERIC_MMC
77#define CONFIG_MMC
78#define CONFIG_OMAP_HSMMC
79#define CONFIG_DOS_PARTITION
Dirk Behme9d0fc812009-01-28 21:39:57 +010080
81/* commands to include */
82#include <config_cmd_default.h>
83
Steve Sakoman68b0fbf2010-09-29 13:58:34 -070084#define CONFIG_CMD_CACHE
Dirk Behme9d0fc812009-01-28 21:39:57 +010085#define CONFIG_CMD_EXT2 /* EXT2 Support */
86#define CONFIG_CMD_FAT /* FAT support */
87#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
88
89#define CONFIG_CMD_I2C /* I2C serial bus support */
90#define CONFIG_CMD_MMC /* MMC support */
91#define CONFIG_CMD_NAND /* NAND support */
92
93#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
94#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
95#undef CONFIG_CMD_IMI /* iminfo */
96#undef CONFIG_CMD_IMLS /* List all found images */
Dirk Behme9d0fc812009-01-28 21:39:57 +010097#undef CONFIG_CMD_NFS /* NFS support */
Olof Johanssondf382622009-09-29 10:22:45 -040098#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
Dirk Behme9d0fc812009-01-28 21:39:57 +010099
100#define CONFIG_SYS_NO_FLASH
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000101#define CONFIG_HARD_I2C
Dirk Behme9d0fc812009-01-28 21:39:57 +0100102#define CONFIG_SYS_I2C_SPEED 100000
103#define CONFIG_SYS_I2C_SLAVE 1
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000104#define CONFIG_I2C_MULTI_BUS
105#define CONFIG_DRIVER_OMAP34XX_I2C
Dirk Behme9d0fc812009-01-28 21:39:57 +0100106
107/*
Tom Rix2c155132009-06-28 12:52:30 -0500108 * TWL4030
109 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000110#define CONFIG_TWL4030_POWER
111#define CONFIG_TWL4030_LED
Tom Rix2c155132009-06-28 12:52:30 -0500112
113/*
Dirk Behme9d0fc812009-01-28 21:39:57 +0100114 * Board NAND Info.
115 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000116#define CONFIG_SYS_NAND_QUIET_TEST
Dirk Behme9d0fc812009-01-28 21:39:57 +0100117#define CONFIG_NAND_OMAP_GPMC
118#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
119 /* to access nand */
120#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
121 /* to access nand */
122 /* at CS0 */
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000123#define GPMC_NAND_ECC_LP_x16_LAYOUT
Dirk Behme9d0fc812009-01-28 21:39:57 +0100124
125#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
126 /* devices */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100127#define CONFIG_JFFS2_NAND
128/* nand device jffs2 lives on */
129#define CONFIG_JFFS2_DEV "nand0"
130/* start of jffs2 partition */
131#define CONFIG_JFFS2_PART_OFFSET 0x680000
132#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
133 /* partition */
134
135/* Environment information */
136#define CONFIG_BOOTDELAY 5
137
138#define CONFIG_EXTRA_ENV_SETTINGS \
139 "loadaddr=0x82000000\0" \
Philip Balister75b988a2011-10-11 11:23:21 +0000140 "console=ttyO2,115200n8\0" \
Steve Sakoman5af32462010-02-03 14:39:14 -0800141 "mpurate=500\0" \
Philip Balistere6847db2011-10-11 11:23:23 +0000142 "optargs=\0" \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400143 "vram=12M\0" \
144 "dvimode=1024x768MR-16@60\0" \
145 "defaultdisplay=dvi\0" \
Steve Sakomancd7c5722010-09-19 21:21:07 -0700146 "mmcdev=0\0" \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400147 "mmcroot=/dev/mmcblk0p2 rw\0" \
148 "mmcrootfstype=ext3 rootwait\0" \
Steve Sakoman254973e2011-09-30 09:20:57 +0000149 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
150 "nandrootfstype=ubifs\0" \
Dirk Behme9d0fc812009-01-28 21:39:57 +0100151 "mmcargs=setenv bootargs console=${console} " \
Philip Balistere6847db2011-10-11 11:23:23 +0000152 "${optargs} " \
Steve Sakoman5af32462010-02-03 14:39:14 -0800153 "mpurate=${mpurate} " \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400154 "vram=${vram} " \
155 "omapfb.mode=dvi:${dvimode} " \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400156 "omapdss.def_disp=${defaultdisplay} " \
157 "root=${mmcroot} " \
158 "rootfstype=${mmcrootfstype}\0" \
Dirk Behme9d0fc812009-01-28 21:39:57 +0100159 "nandargs=setenv bootargs console=${console} " \
Philip Balistere6847db2011-10-11 11:23:23 +0000160 "${optargs} " \
Steve Sakoman5af32462010-02-03 14:39:14 -0800161 "mpurate=${mpurate} " \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400162 "vram=${vram} " \
163 "omapfb.mode=dvi:${dvimode} " \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400164 "omapdss.def_disp=${defaultdisplay} " \
165 "root=${nandroot} " \
166 "rootfstype=${nandrootfstype}\0" \
Steve Sakomancd7c5722010-09-19 21:21:07 -0700167 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
Dirk Behme9d0fc812009-01-28 21:39:57 +0100168 "bootscript=echo Running bootscript from mmc ...; " \
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200169 "source ${loadaddr}\0" \
Steve Sakomancd7c5722010-09-19 21:21:07 -0700170 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
Dirk Behme9d0fc812009-01-28 21:39:57 +0100171 "mmcboot=echo Booting from mmc ...; " \
172 "run mmcargs; " \
173 "bootm ${loadaddr}\0" \
174 "nandboot=echo Booting from nand ...; " \
175 "run nandargs; " \
176 "nand read ${loadaddr} 280000 400000; " \
177 "bootm ${loadaddr}\0" \
178
179#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000180 "mmc dev ${mmcdev}; if mmc rescan; then " \
Dirk Behme9d0fc812009-01-28 21:39:57 +0100181 "if run loadbootscript; then " \
182 "run bootscript; " \
183 "else " \
184 "if run loaduimage; then " \
185 "run mmcboot; " \
186 "else run nandboot; " \
187 "fi; " \
188 "fi; " \
189 "else run nandboot; fi"
190
191#define CONFIG_AUTO_COMPLETE 1
192/*
193 * Miscellaneous configurable options
194 */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100195#define CONFIG_SYS_LONGHELP /* undef to save memory */
196#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Robert P. J. Day1270ec12009-12-12 12:10:33 -0500197#define CONFIG_SYS_PROMPT "Overo # "
Vaibhav Hiremathf62b1252011-09-03 21:24:19 -0400198#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100199/* Print Buffer Size */
200#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
201 sizeof(CONFIG_SYS_PROMPT) + 16)
202#define CONFIG_SYS_MAXARGS 16 /* max number of command */
203 /* args */
204/* Boot Argument Buffer Size */
205#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
206/* memtest works on */
207#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
208#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
209 0x01F00000) /* 31MB */
210
Dirk Behme9d0fc812009-01-28 21:39:57 +0100211#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
212 /* address */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100213/*
Manikandan Pillaid3a513c2009-04-21 17:29:05 +0200214 * OMAP3 has 12 GP timers, they can be driven by the system clock
215 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
216 * This rate is divided by a local divisor.
Dirk Behme9d0fc812009-01-28 21:39:57 +0100217 */
Manikandan Pillaid3a513c2009-04-21 17:29:05 +0200218#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
219#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
220#define CONFIG_SYS_HZ 1000
Dirk Behme9d0fc812009-01-28 21:39:57 +0100221
222/*-----------------------------------------------------------------------
Dirk Behme9d0fc812009-01-28 21:39:57 +0100223 * Physical Memory Map
224 */
225#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
226#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Dirk Behme9d0fc812009-01-28 21:39:57 +0100227#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
228
Dirk Behme9d0fc812009-01-28 21:39:57 +0100229/*-----------------------------------------------------------------------
230 * FLASH and environment organization
231 */
232
233/* **** PISMO SUPPORT *** */
234
235/* Configure the PISMO */
236#define PISMO1_NAND_SIZE GPMC_SIZE_128M
237#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
238
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400239#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100240
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400241#if defined(CONFIG_CMD_NAND)
242#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
243#endif
Dirk Behme9d0fc812009-01-28 21:39:57 +0100244
245/* Monitor at start of flash */
246#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
247#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
248
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000249#define CONFIG_ENV_IS_IN_NAND
Dirk Behme9d0fc812009-01-28 21:39:57 +0100250#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
251#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
252
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400253#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
254#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Dirk Behme9d0fc812009-01-28 21:39:57 +0100255#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
256
Olof Johanssondf382622009-09-29 10:22:45 -0400257#if defined(CONFIG_CMD_NET)
258/*----------------------------------------------------------------------------
259 * SMSC9211 Ethernet from SMSC9118 family
260 *----------------------------------------------------------------------------
261 */
262
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000263#define CONFIG_SMC911X
Olof Johanssondf382622009-09-29 10:22:45 -0400264#define CONFIG_SMC911X_32_BIT
Andreas Müller0f8d3eb2012-01-04 15:26:21 +0000265#define CONFIG_SMC911X_BASE 0x2C000000
Olof Johanssondf382622009-09-29 10:22:45 -0400266
267#endif /* (CONFIG_CMD_NET) */
268
Andreas Müller137703b2012-01-04 15:26:25 +0000269/*
270 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
271 * and older u-boot.bin with the new U-Boot SPL.
272 */
273#define CONFIG_SYS_TEXT_BASE 0x80008000
Steve Sakoman4d7d7bc2010-09-29 13:54:19 -0700274#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Steve Sakoman31bfcf12010-10-27 05:04:30 -0700275#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
276#define CONFIG_SYS_INIT_RAM_SIZE 0x800
277#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
278 CONFIG_SYS_INIT_RAM_SIZE - \
279 GENERATED_GBL_DATA_SIZE)
Steve Sakoman4d7d7bc2010-09-29 13:54:19 -0700280
Aneesh V8e408522011-11-21 23:38:59 +0000281#define CONFIG_SYS_CACHELINE_SIZE 64
282
Andreas Müller137703b2012-01-04 15:26:25 +0000283/* Defines for SPL */
284#define CONFIG_SPL
Tom Rini47f7bca2012-08-13 12:03:19 -0700285#define CONFIG_SPL_FRAMEWORK
Andreas Müller137703b2012-01-04 15:26:25 +0000286#define CONFIG_SPL_NAND_SIMPLE
287#define CONFIG_SPL_TEXT_BASE 0x40200800
Tom Rinie0820cc2012-05-08 07:29:31 +0000288#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Andreas Müller137703b2012-01-04 15:26:25 +0000289#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
290
291/* move malloc and bss high to prevent clashing with the main image */
292#define CONFIG_SYS_SPL_MALLOC_START 0x87000000
293#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
294#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */
295#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
296
297#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
298#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
299#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
300#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
301
Tom Rini49175c42012-05-08 07:29:32 +0000302#define CONFIG_SPL_BOARD_INIT
Andreas Müller137703b2012-01-04 15:26:25 +0000303#define CONFIG_SPL_LIBCOMMON_SUPPORT
304#define CONFIG_SPL_LIBDISK_SUPPORT
305#define CONFIG_SPL_I2C_SUPPORT
306#define CONFIG_SPL_LIBGENERIC_SUPPORT
307#define CONFIG_SPL_MMC_SUPPORT
308#define CONFIG_SPL_FAT_SUPPORT
309#define CONFIG_SPL_SERIAL_SUPPORT
310#define CONFIG_SPL_NAND_SUPPORT
Scott Wood6f2f01b2012-09-20 19:09:07 -0500311#define CONFIG_SPL_NAND_BASE
312#define CONFIG_SPL_NAND_DRIVERS
313#define CONFIG_SPL_NAND_ECC
Marek Vasut16e41c82012-07-21 05:02:27 +0000314#define CONFIG_SPL_GPIO_SUPPORT
Andreas Müller137703b2012-01-04 15:26:25 +0000315#define CONFIG_SPL_POWER_SUPPORT
316#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
317
318/* NAND boot config */
319#define CONFIG_SYS_NAND_5_ADDR_CYCLE
320#define CONFIG_SYS_NAND_PAGE_COUNT 64
321#define CONFIG_SYS_NAND_PAGE_SIZE 2048
322#define CONFIG_SYS_NAND_OOBSIZE 64
323#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
324#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
325#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
326 10, 11, 12, 13}
327#define CONFIG_SYS_NAND_ECCSIZE 512
328#define CONFIG_SYS_NAND_ECCBYTES 3
Andreas Müller137703b2012-01-04 15:26:25 +0000329#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
330#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
331
Dirk Behme9d0fc812009-01-28 21:39:57 +0100332#endif /* __CONFIG_H */