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Fabian Vogt46025582016-09-26 14:26:47 +02001#include "bcm283x.dtsi"
Simon Glass9ae600e2021-12-16 20:59:13 -07002#include "bcm2835-common.dtsi"
3#include "bcm2835-rpi-common.dtsi"
Fabian Vogt46025582016-09-26 14:26:47 +02004
5/ {
Alexander Graf409f05f2017-10-04 14:39:16 +02006 compatible = "brcm,bcm2837";
Fabian Vogt46025582016-09-26 14:26:47 +02007
8 soc {
9 ranges = <0x7e000000 0x3f000000 0x1000000>,
10 <0x40000000 0x40000000 0x00001000>;
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12
Heinrich Schuchardt143256b2019-04-28 06:46:57 +020013 local_intc: local_intc@40000000 {
Fabian Vogt46025582016-09-26 14:26:47 +020014 compatible = "brcm,bcm2836-l1-intc";
15 reg = <0x40000000 0x100>;
16 interrupt-controller;
Heinrich Schuchardt143256b2019-04-28 06:46:57 +020017 #interrupt-cells = <2>;
Fabian Vogt46025582016-09-26 14:26:47 +020018 interrupt-parent = <&local_intc>;
19 };
20 };
21
Heinrich Schuchardt143256b2019-04-28 06:46:57 +020022 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
24 interrupt-parent = <&local_intc>;
25 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
26 };
27
Fabian Vogt46025582016-09-26 14:26:47 +020028 timer {
29 compatible = "arm,armv7-timer";
30 interrupt-parent = <&local_intc>;
Heinrich Schuchardt143256b2019-04-28 06:46:57 +020031 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
32 <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
33 <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
34 <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
Fabian Vogt46025582016-09-26 14:26:47 +020035 always-on;
36 };
37
38 cpus: cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
Alexander Graf409f05f2017-10-04 14:39:16 +020041 enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
Fabian Vogt46025582016-09-26 14:26:47 +020042
43 cpu0: cpu@0 {
44 device_type = "cpu";
45 compatible = "arm,cortex-a53";
46 reg = <0>;
47 enable-method = "spin-table";
48 cpu-release-addr = <0x0 0x000000d8>;
49 };
50
51 cpu1: cpu@1 {
52 device_type = "cpu";
53 compatible = "arm,cortex-a53";
54 reg = <1>;
55 enable-method = "spin-table";
56 cpu-release-addr = <0x0 0x000000e0>;
57 };
58
59 cpu2: cpu@2 {
60 device_type = "cpu";
61 compatible = "arm,cortex-a53";
62 reg = <2>;
63 enable-method = "spin-table";
64 cpu-release-addr = <0x0 0x000000e8>;
65 };
66
67 cpu3: cpu@3 {
68 device_type = "cpu";
69 compatible = "arm,cortex-a53";
70 reg = <3>;
71 enable-method = "spin-table";
72 cpu-release-addr = <0x0 0x000000f0>;
73 };
74 };
75};
76
77/* Make the BCM2835-style global interrupt controller be a child of the
78 * CPU-local interrupt controller.
79 */
80&intc {
81 compatible = "brcm,bcm2836-armctrl-ic";
82 reg = <0x7e00b200 0x200>;
83 interrupt-parent = <&local_intc>;
Heinrich Schuchardt143256b2019-04-28 06:46:57 +020084 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
Fabian Vogt46025582016-09-26 14:26:47 +020085};
Alexander Graf409f05f2017-10-04 14:39:16 +020086
87&cpu_thermal {
88 coefficients = <(-538) 412000>;
89};
90
91/* enable thermal sensor with the correct compatible property set */
92&thermal {
93 compatible = "brcm,bcm2837-thermal";
94 status = "okay";
95};