blob: b9d4fc9c12a0468f0a2fe7a73b5b1c28c61cba18 [file] [log] [blame]
Simon Glasse2e947f2015-08-30 16:55:42 -06001CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4CONFIG_ROCKCHIP_RK3288=y
Tom Rini8728c972017-03-13 13:48:42 -04005# CONFIG_SPL_MMC_SUPPORT is not set
Simon Glasse2e947f2015-08-30 16:55:42 -06006CONFIG_TARGET_CHROMEBOOK_JERRY=y
Simon Glasse404ade2016-09-12 23:18:57 -06007CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassf35ed9e2016-09-12 23:18:58 -06008CONFIG_SPL_SPI_SUPPORT=y
Thomas Choue4aa8ed2015-11-11 21:39:33 +08009CONFIG_SPL_STACK_R_ADDR=0x80000
Simon Glass5e9b1502016-11-13 14:22:10 -070010CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
Tom Rinifb82fe32017-06-19 09:47:40 -040011CONFIG_DEBUG_UART=y
Simon Glass2be29652017-07-23 21:19:39 -060012CONFIG_ENV_IS_NOWHERE=y
Simon Glass98af8792016-10-17 20:12:35 -060013CONFIG_SILENT_CONSOLE=y
Simon Glassef26d602016-10-17 20:12:37 -060014# CONFIG_DISPLAY_CPUINFO is not set
Simon Glassfe974712017-05-31 17:57:33 -060015CONFIG_BOARD_EARLY_INIT_F=y
Simon Glasse2e947f2015-08-30 16:55:42 -060016CONFIG_SPL_STACK_R=y
Simon Glassec4ac4e2016-01-21 19:43:35 -070017CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Simon Glasse2e947f2015-08-30 16:55:42 -060018# CONFIG_CMD_IMLS is not set
Patrick Delaunayb331cd62017-01-27 11:00:42 +010019CONFIG_CMD_GPT=y
Tom Rini89cb2b52016-04-24 17:29:26 -040020CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -040021CONFIG_CMD_SF=y
22CONFIG_CMD_SPI=y
23CONFIG_CMD_I2C=y
24CONFIG_CMD_GPIO=y
Simon Glasse2e947f2015-08-30 16:55:42 -060025# CONFIG_CMD_SETEXPR is not set
Tom Rini89cb2b52016-04-24 17:29:26 -040026CONFIG_CMD_CACHE=y
Tom Rini78d1e1d2016-04-22 16:41:25 -040027CONFIG_CMD_TIME=y
Simon Glasse2e947f2015-08-30 16:55:42 -060028CONFIG_CMD_PMIC=y
29CONFIG_CMD_REGULATOR=y
Patrick Delaunayb0cf7332017-01-27 11:00:37 +010030# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay1acc0082017-01-27 11:00:38 +010031# CONFIG_SPL_ISO_PARTITION is not set
Patrick Delaunaybd42a942017-01-27 11:00:41 +010032# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunayb331cd62017-01-27 11:00:42 +010033CONFIG_SPL_PARTITION_UUIDS=y
Simon Glasse2e947f2015-08-30 16:55:42 -060034CONFIG_SPL_OF_CONTROL=y
Simon Glass57db8c62016-11-13 14:22:09 -070035CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Masahiro Yamada18780952016-12-07 22:10:25 +090036CONFIG_SPL_OF_PLATDATA=y
Simon Glasse2e947f2015-08-30 16:55:42 -060037CONFIG_REGMAP=y
huang lin41c7f662015-11-17 14:20:13 +080038CONFIG_SPL_REGMAP=y
Simon Glasse2e947f2015-08-30 16:55:42 -060039CONFIG_SYSCON=y
Simon Glassec4ac4e2016-01-21 19:43:35 -070040CONFIG_SPL_SYSCON=y
Simon Glass79918092016-01-21 19:43:49 -070041# CONFIG_SPL_SIMPLE_BUS is not set
Bin Meng80df6912015-09-28 05:14:15 -070042CONFIG_CLK=y
43CONFIG_SPL_CLK=y
44CONFIG_ROCKCHIP_GPIO=y
Simon Glass27a19612016-01-21 19:44:13 -070045CONFIG_I2C_CROS_EC_TUNNEL=y
Bin Meng80df6912015-09-28 05:14:15 -070046CONFIG_SYS_I2C_ROCKCHIP=y
Simon Glass27a19612016-01-21 19:44:13 -070047CONFIG_I2C_MUX=y
Simon Glassef26d602016-10-17 20:12:37 -060048CONFIG_DM_KEYBOARD=y
Simon Glass27a19612016-01-21 19:44:13 -070049CONFIG_CROS_EC_KEYB=y
Simon Glass27a19612016-01-21 19:44:13 -070050CONFIG_CROS_EC=y
51CONFIG_CROS_EC_SPI=y
Simon Glass79d020e2016-01-21 19:43:36 -070052CONFIG_PWRSEQ=y
Masahiro Yamada55ed3b42017-01-10 13:32:04 +090053CONFIG_MMC_DW=y
Masahiro Yamadafed44082017-01-10 13:32:03 +090054CONFIG_MMC_DW_ROCKCHIP=y
Simon Glasse2e947f2015-08-30 16:55:42 -060055CONFIG_PINCTRL=y
Simon Glasse2e947f2015-08-30 16:55:42 -060056CONFIG_SPL_PINCTRL=y
Simon Glassdd8e4292015-12-29 05:22:45 -070057# CONFIG_SPL_PINCTRL_FULL is not set
Philipp Tomsich51c7f342017-04-19 16:46:37 +020058CONFIG_PINCTRL_ROCKCHIP_RK3288=y
Simon Glasse2e947f2015-08-30 16:55:42 -060059CONFIG_DM_PMIC=y
Simon Glass27a19612016-01-21 19:44:13 -070060# CONFIG_SPL_PMIC_CHILDREN is not set
Jacob Chen453c5a92017-05-02 14:54:52 +080061CONFIG_PMIC_RK8XX=y
Simon Glass74336f72016-01-21 19:45:19 -070062CONFIG_DM_REGULATOR_FIXED=y
Jacob Chen453c5a92017-05-02 14:54:52 +080063CONFIG_REGULATOR_RK8XX=y
Simon Glass74336f72016-01-21 19:45:19 -070064CONFIG_PWM_ROCKCHIP=y
Simon Glasse2e947f2015-08-30 16:55:42 -060065CONFIG_RAM=y
66CONFIG_SPL_RAM=y
Bin Meng80df6912015-09-28 05:14:15 -070067CONFIG_DEBUG_UART_BASE=0xff690000
68CONFIG_DEBUG_UART_CLOCK=24000000
69CONFIG_DEBUG_UART_SHIFT=2
Thomas Chou9e390032015-11-19 21:48:14 +080070CONFIG_SYS_NS16550=y
Simon Glass57db8c62016-11-13 14:22:09 -070071CONFIG_ROCKCHIP_SERIAL=y
Simon Glassec4ac4e2016-01-21 19:43:35 -070072CONFIG_ROCKCHIP_SPI=y
Tom Riniaca5cd22016-09-08 16:11:59 -040073CONFIG_SYSRESET=y
Simon Glass74336f72016-01-21 19:45:19 -070074CONFIG_DM_VIDEO=y
Anatolij Gustschin7588c312016-01-25 17:17:22 +010075CONFIG_DISPLAY=y
Simon Glass74336f72016-01-21 19:45:19 -070076CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.comb98f0a32017-04-17 22:24:23 +080077CONFIG_DISPLAY_ROCKCHIP_EDP=y
78CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Simon Glassdd8e4292015-12-29 05:22:45 -070079CONFIG_USE_TINY_PRINTF=y
Simon Glasse2e947f2015-08-30 16:55:42 -060080CONFIG_CMD_DHRYSTONE=y
81CONFIG_ERRNO_STR=y
Simon Glass57db8c62016-11-13 14:22:09 -070082# CONFIG_SPL_OF_LIBFDT is not set