Simon Glass | 62f9b65 | 2019-11-14 12:57:09 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2000-2009 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * Copyright 2019 Google LLC |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CPU_LEGACY_H |
| 9 | #define __CPU_LEGACY_H |
| 10 | |
| 11 | #include <linux/types.h> |
| 12 | |
| 13 | /* |
| 14 | * Multicore arch functions |
| 15 | * |
| 16 | * These should be moved to use the CPU uclass. |
| 17 | */ |
| 18 | int cpu_status(u32 nr); |
| 19 | int cpu_reset(u32 nr); |
| 20 | int cpu_disable(u32 nr); |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 21 | int cpu_release(u32 nr, int argc, char *const argv[]); |
Simon Glass | 62f9b65 | 2019-11-14 12:57:09 -0700 | [diff] [blame] | 22 | |
Simon Glass | 30c7c43 | 2019-11-14 12:57:34 -0700 | [diff] [blame] | 23 | static inline int cpumask_next(int cpu, unsigned int mask) |
| 24 | { |
| 25 | for (cpu++; !((1 << cpu) & mask); cpu++) |
| 26 | ; |
| 27 | |
| 28 | return cpu; |
| 29 | } |
| 30 | |
| 31 | #define for_each_cpu(iter, cpu, num_cpus, mask) \ |
| 32 | for (iter = 0, cpu = cpumask_next(-1, mask); \ |
| 33 | iter < num_cpus; \ |
| 34 | iter++, cpu = cpumask_next(cpu, mask)) \ |
| 35 | |
| 36 | int cpu_numcores(void); |
| 37 | int cpu_num_dspcores(void); |
| 38 | u32 cpu_mask(void); |
| 39 | u32 cpu_dsp_mask(void); |
| 40 | int is_core_valid(unsigned int core); |
| 41 | |
| 42 | /** |
| 43 | * checkcpu() - perform an early check of the CPU |
| 44 | * |
| 45 | * This is used on PowerPC, SH and X86 machines as a CPU init mechanism. It is |
| 46 | * called during the pre-relocation init sequence in board_init_f(). |
| 47 | * |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 48 | * Return: 0 if oK, -ve on error |
Simon Glass | 30c7c43 | 2019-11-14 12:57:34 -0700 | [diff] [blame] | 49 | */ |
| 50 | int checkcpu(void); |
| 51 | |
Simon Glass | 62270f4 | 2019-11-14 12:57:35 -0700 | [diff] [blame] | 52 | void smp_set_core_boot_addr(unsigned long addr, int corenr); |
| 53 | void smp_kick_all_cpus(void); |
| 54 | |
Simon Glass | 9edefc2 | 2019-11-14 12:57:37 -0700 | [diff] [blame] | 55 | int icache_status(void); |
| 56 | void icache_enable(void); |
| 57 | void icache_disable(void); |
| 58 | int dcache_status(void); |
| 59 | void dcache_enable(void); |
| 60 | void dcache_disable(void); |
| 61 | void mmu_disable(void); |
Patrice Chotard | 268f6ac | 2021-07-19 11:21:51 +0200 | [diff] [blame] | 62 | int mmu_status(void); |
Simon Glass | 9edefc2 | 2019-11-14 12:57:37 -0700 | [diff] [blame] | 63 | |
Simon Glass | 1eb69ae | 2019-11-14 12:57:39 -0700 | [diff] [blame] | 64 | /* arch/$(ARCH)/lib/cache.c */ |
| 65 | void enable_caches(void); |
| 66 | void flush_cache(unsigned long addr, unsigned long size); |
| 67 | void flush_dcache_all(void); |
| 68 | void flush_dcache_range(unsigned long start, unsigned long stop); |
| 69 | void invalidate_dcache_range(unsigned long start, unsigned long stop); |
| 70 | void invalidate_dcache_all(void); |
| 71 | void invalidate_icache_all(void); |
| 72 | |
| 73 | enum { |
| 74 | /* Disable caches (else flush caches but leave them active) */ |
| 75 | CBL_DISABLE_CACHES = 1 << 0, |
| 76 | CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1, |
| 77 | |
| 78 | CBL_ALL = 3, |
| 79 | }; |
| 80 | |
| 81 | /** |
| 82 | * Clean up ready for linux |
| 83 | * |
| 84 | * @param flags Flags to control what is done |
| 85 | */ |
| 86 | int cleanup_before_linux_select(int flags); |
Simon Glass | 9a3b4ce | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 87 | |
Harald Seiler | 35b65dd | 2020-12-15 16:47:52 +0100 | [diff] [blame] | 88 | void reset_cpu(void); |
| 89 | |
Simon Glass | 62f9b65 | 2019-11-14 12:57:09 -0700 | [diff] [blame] | 90 | #endif |