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wdenk8f0b7cb2005-03-27 23:41:39 +00001/*
2 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02003 * Stäubli Faverges - <www.staubli.com>
wdenk8f0b7cb2005-03-27 23:41:39 +00004 * Pierre AUBERT p.aubert@staubli.com
5 *
6 * (C) Copyright 2005
7 * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/*
29 * Basic video support for SMI SM501 "Voyager" graphic controller
30 */
31
32#include <common.h>
33
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020034#include <asm/io.h>
wdenk8f0b7cb2005-03-27 23:41:39 +000035#include <video_fb.h>
36#include <sm501.h>
37
38#define read8(ptrReg) \
39 *(volatile unsigned char *)(sm501.isaBase + ptrReg)
40
41#define write8(ptrReg,value) \
42 *(volatile unsigned char *)(sm501.isaBase + ptrReg) = value
43
44#define read16(ptrReg) \
45 (*(volatile unsigned short *)(sm501.isaBase + ptrReg))
46
47#define write16(ptrReg,value) \
48 (*(volatile unsigned short *)(sm501.isaBase + ptrReg) = value)
49
50#define read32(ptrReg) \
51 (*(volatile unsigned int *)(sm501.isaBase + ptrReg))
52
53#define write32(ptrReg, value) \
54 (*(volatile unsigned int *)(sm501.isaBase + ptrReg) = value)
55
56GraphicDevice sm501;
57
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020058void write_be32(int off, unsigned int val)
59{
60 out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
61}
62
63void write_le32(int off, unsigned int val)
64{
65 out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
66}
67
68void (*write_reg32)(int off, unsigned int val) = write_be32;
69
wdenk8f0b7cb2005-03-27 23:41:39 +000070/*-----------------------------------------------------------------------------
71 * SmiSetRegs --
72 *-----------------------------------------------------------------------------
73 */
74static void SmiSetRegs (void)
75{
76 /*
77 * The content of the chipset register depends on the board (clocks,
78 * ...)
79 */
80 const SMI_REGS *preg = board_get_regs ();
81 while (preg->Index) {
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020082 write_reg32 (preg->Index, preg->Value);
wdenk8f0b7cb2005-03-27 23:41:39 +000083 /*
84 * Insert a delay between
85 */
86 udelay (1000);
87 preg ++;
88 }
89}
90
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +020091#ifdef CONFIG_VIDEO_SM501_PCI
92static struct pci_device_id sm501_pci_tbl[] = {
93 { PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
94 {}
95};
96#endif
97
Anatolij Gustschinf0a92152010-05-26 10:38:58 +020098/*
99 * We do not enforce board code to provide empty/unused
100 * functions for this driver and define weak default
101 * functions here.
102 */
103unsigned int __board_video_init (void)
104{
105 return 0;
106}
107
108unsigned int board_video_init (void)
109 __attribute__((weak, alias("__board_video_init")));
110
111unsigned int __board_video_get_fb (void)
112{
113 return 0;
114}
115
116unsigned int board_video_get_fb (void)
117 __attribute__((weak, alias("__board_video_get_fb")));
118
119void __board_validate_screen (unsigned int base)
120{
121}
122
123void board_validate_screen (unsigned int base)
124 __attribute__((weak, alias("__board_validate_screen")));
125
wdenk8f0b7cb2005-03-27 23:41:39 +0000126/*-----------------------------------------------------------------------------
127 * video_hw_init --
128 *-----------------------------------------------------------------------------
129 */
130void *video_hw_init (void)
131{
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200132#ifdef CONFIG_VIDEO_SM501_PCI
133 unsigned int pci_mem_base, pci_mmio_base;
134 unsigned int id;
135 unsigned short device_id;
136 pci_dev_t devbusfn;
137 int mem;
138#endif
wdenk8f0b7cb2005-03-27 23:41:39 +0000139 unsigned int *vm, i;
140
141 memset (&sm501, 0, sizeof (GraphicDevice));
142
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200143#ifdef CONFIG_VIDEO_SM501_PCI
144 printf("Video: ");
145
146 /* Look for SM501/SM502 chips */
147 devbusfn = pci_find_devices(sm501_pci_tbl, 0);
148 if (devbusfn < 0) {
149 printf ("PCI Controller not found.\n");
150 goto not_pci;
151 }
152
153 /* Setup */
154 pci_write_config_dword (devbusfn, PCI_COMMAND,
155 (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
156 pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
157 pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
158 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
159 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
160 sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
161 sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
162
163 if (sm501.isaBase)
164 write_reg32 = write_le32;
165
166 mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
167 mem = (mem & 0x0000e000) >> 13;
168 switch (mem) {
169 case 1:
170 mem = 8;
171 break;
172 case 2:
173 mem = 16;
174 break;
175 case 3:
176 mem = 32;
177 break;
178 case 4:
179 mem = 64;
180 break;
181 case 5:
182 mem = 2;
183 break;
184 case 0:
185 default:
186 mem = 4;
187 }
188 printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
189not_pci:
190#endif
wdenk8f0b7cb2005-03-27 23:41:39 +0000191 /*
192 * Initialization of the access to the graphic chipset Retreive base
193 * address of the chipset (see board/RPXClassic/eccx.c)
194 */
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200195 if (!sm501.isaBase) {
196 sm501.isaBase = board_video_init ();
197 if (!sm501.isaBase)
198 return NULL;
wdenk8f0b7cb2005-03-27 23:41:39 +0000199 }
200
Anatolij Gustschine2bee9e2010-05-26 10:38:57 +0200201 if (!sm501.frameAdrs) {
202 sm501.frameAdrs = board_video_get_fb ();
203 if (!sm501.frameAdrs)
204 return NULL;
wdenk8f0b7cb2005-03-27 23:41:39 +0000205 }
206
207 sm501.winSizeX = board_get_width ();
208 sm501.winSizeY = board_get_height ();
209
210#if defined(CONFIG_VIDEO_SM501_8BPP)
211 sm501.gdfIndex = GDF__8BIT_INDEX;
212 sm501.gdfBytesPP = 1;
213
214#elif defined(CONFIG_VIDEO_SM501_16BPP)
215 sm501.gdfIndex = GDF_16BIT_565RGB;
216 sm501.gdfBytesPP = 2;
217
218#elif defined(CONFIG_VIDEO_SM501_32BPP)
219 sm501.gdfIndex = GDF_32BIT_X888RGB;
220 sm501.gdfBytesPP = 4;
221#else
222#error Unsupported SM501 BPP
223#endif
224
225 sm501.memSize = sm501.winSizeX * sm501.winSizeY * sm501.gdfBytesPP;
226
227 /* Load Smi registers */
228 SmiSetRegs ();
229
230 /* (see board/RPXClassic/RPXClassic.c) */
231 board_validate_screen (sm501.isaBase);
232
233 /* Clear video memory */
234 i = sm501.memSize/4;
235 vm = (unsigned int *)sm501.frameAdrs;
236 while(i--)
237 *vm++ = 0;
238
239 return (&sm501);
240}