blob: 763a47ac3dc445566d214ddb69de70928818d5ea [file] [log] [blame]
Alexander Graffa08d392014-04-11 17:09:45 +02001/*
2 * Copyright 2011-2014 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/*
8 * Corenet DS style board configuration file
9 */
10#ifndef __QEMU_PPCE500_H
11#define __QEMU_PPCE500_H
12
13#define CONFIG_CMD_REGINFO
14
15/* High Level Configuration Options */
16#define CONFIG_BOOKE
17#define CONFIG_E500 /* BOOKE e500 family */
18#define CONFIG_QEMU_E500
19
20#undef CONFIG_SYS_TEXT_BASE
21#define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */
Alexander Grafeab3bfb2014-04-30 19:21:14 +020022#define CONFIG_SYS_GENERIC_BOARD
Alexander Graffa08d392014-04-11 17:09:45 +020023
24#define CONFIG_SYS_MPC85XX_NO_RESETVEC
25
26#define CONFIG_SYS_RAMBOOT
27
28#define CONFIG_PCI /* Enable PCI/PCIE */
29#define CONFIG_PCI1 1 /* PCI controller 1 */
30#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
31#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
32
33#define CONFIG_ENV_OVERWRITE
34
35#define CONFIG_ENABLE_36BIT_PHYS
36
37#define CONFIG_ADDR_MAP
38#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
39
40#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
41#define CONFIG_SYS_MEMTEST_END 0x00400000
42#define CONFIG_SYS_ALT_MEMTEST
43#define CONFIG_PANIC_HANG /* do not reset board on panic */
44
45/* Needed to fill the ccsrbar pointer */
46#define CONFIG_BOARD_EARLY_INIT_F
47
48/* Virtual address to CCSRBAR */
49#define CONFIG_SYS_CCSRBAR 0xe0000000
50/* Physical address should be a function call */
51#ifndef __ASSEMBLY__
52extern unsigned long long get_phys_ccsrbar_addr_early(void);
53#endif
54#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
55
56/* Virtual address range for PCI region maps */
57#define CONFIG_SYS_PCI_MAP_START 0x80000000
58#define CONFIG_SYS_PCI_MAP_END 0xe8000000
59
60/* Virtual address to a temporary map if we need it (max 128MB) */
61#define CONFIG_SYS_TMPVIRT 0xe8000000
62
63/*
64 * DDR Setup
65 */
66#define CONFIG_VERY_BIG_RAM
67#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
68#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
69
70#define CONFIG_CHIP_SELECTS_PER_CTRL 0
71
72#define CONFIG_SYS_CLK_FREQ 33000000
73
74#define CONFIG_SYS_NO_FLASH
75
76#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
77
78#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
79
80#define CONFIG_ENV_IS_NOWHERE
81
82#define CONFIG_HWCONFIG
83
84#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
85#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
86#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
87/* The assembler doesn't like typecast */
88#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
89 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
90 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
91#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
92
93#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
94 GENERATED_GBL_DATA_SIZE)
95#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
96
97#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
98#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
99
100#define CONFIG_CONS_INDEX 1
101#define CONFIG_SYS_NS16550
102#define CONFIG_SYS_NS16550_SERIAL
103#define CONFIG_SYS_NS16550_REG_SIZE 1
104#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
105
106#define CONFIG_SYS_BAUDRATE_TABLE \
107 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
108
109#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
110#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
111
112/* Use the HUSH parser */
113#define CONFIG_SYS_HUSH_PARSER
114#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
115
116/* pass open firmware flat tree */
117#define CONFIG_OF_LIBFDT
118#define CONFIG_OF_BOARD_SETUP
119#define CONFIG_OF_STDOUT_VIA_ALIAS
120
121/* new uImage format support */
122#define CONFIG_FIT
123#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
124
125/*
126 * General PCI
127 * Memory space is mapped 1-1, but I/O space must start from 0.
128 */
129
130#ifdef CONFIG_PCI
131#define CONFIG_PCI_INDIRECT_BRIDGE
132#define CONFIG_NET_MULTI
133#define CONFIG_PCI_PNP /* do pci plug-and-play */
134#define CONFIG_E1000
135
136#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
137#define CONFIG_DOS_PARTITION
138#endif /* CONFIG_PCI */
139
140#define CONFIG_LBA48
141#define CONFIG_DOS_PARTITION
142#define CONFIG_CMD_EXT2
143
144/*
145 * Environment
146 */
147#define CONFIG_ENV_SIZE 0x2000
148
149#define CONFIG_LOADS_ECHO /* echo on for serial download */
150
151#define CONFIG_LAST_STAGE_INIT
152
153/*
154 * Command line configuration.
155 */
156#include <config_cmd_default.h>
157
158#define CONFIG_CMD_DHCP
159#define CONFIG_CMD_ELF
160#define CONFIG_CMD_BOOTZ
161#define CONFIG_CMD_GREPENV
162#define CONFIG_CMD_IRQ
163#define CONFIG_CMD_PING
164#define CONFIG_CMD_SETEXPR
165
166#ifdef CONFIG_PCI
167#define CONFIG_CMD_PCI
168#define CONFIG_CMD_NET
169#endif
170
171/*
172 * Miscellaneous configurable options
173 */
174#define CONFIG_SYS_LONGHELP /* undef to save memory */
175#define CONFIG_CMDLINE_EDITING /* Command-line editing */
176#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
177#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
178#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
179#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
180#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
181#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
182
183/*
184 * For booting Linux, the board info and command line data
185 * have to be in the first 64 MB of memory, since this is
186 * the maximum mapped by the Linux kernel during initialization.
187 */
188#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
189#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
190
191/*
192 * Environment Configuration
193 */
194#define CONFIG_ROOTPATH "/opt/nfsroot"
195#define CONFIG_BOOTFILE "uImage"
196#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
197
198/* default location for tftp and bootm */
199#define CONFIG_LOADADDR 1000000
200
201#define CONFIG_BAUDRATE 115200
202
203#define CONFIG_BOOTDELAY 1
204#define CONFIG_BOOTCOMMAND \
205 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
206
207#endif /* __QEMU_PPCE500_H */