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Heiko Schocher2605e902007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocher2605e902007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Heiko Schocher2605e902007-02-16 07:57:42 +010017#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
Wolfgang Denk2ae18242010-10-06 09:05:45 +020019/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020028#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocher2605e902007-02-16 07:57:42 +010029
30#define CONFIG_BOARD_EARLY_INIT_R 1
31#define CONFIG_BOARD_EARLY_INIT_F 1
32
Becky Bruce31d82672008-05-08 19:02:12 -050033#define CONFIG_HIGH_BATS 1 /* High BATs supported */
34
Heiko Schocher2605e902007-02-16 07:57:42 +010035/*
36 * Serial console configuration
37 */
38#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
39#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020040#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocher2605e902007-02-16 07:57:42 +010041
42/*
43 * PCI Mapping:
44 * 0x40000000 - 0x4fffffff - PCI Memory
45 * 0x50000000 - 0x50ffffff - PCI IO Space
46 */
Heiko Schocher2605e902007-02-16 07:57:42 +010047
48#if defined(CONFIG_PCI)
Heiko Schocher2605e902007-02-16 07:57:42 +010049#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liewf33fca22008-03-30 01:19:06 -050050#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocher2605e902007-02-16 07:57:42 +010051
52#define CONFIG_PCI_MEM_BUS 0x40000000
53#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
54#define CONFIG_PCI_MEM_SIZE 0x10000000
55
56#define CONFIG_PCI_IO_BUS 0x50000000
57#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
58#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocher2605e902007-02-16 07:57:42 +010059#endif
60
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocher2605e902007-02-16 07:57:42 +010062
Heiko Schocher2605e902007-02-16 07:57:42 +010063#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocher2605e902007-02-16 07:57:42 +010065
66/* Partitions */
67#define CONFIG_MAC_PARTITION
68#define CONFIG_DOS_PARTITION
69#define CONFIG_ISO_PARTITION
70
71#define CONFIG_TIMESTAMP /* Print image info with timestamp */
72
Jon Loeligerbc234c12007-07-04 22:32:51 -050073/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050074 * BOOTP options
75 */
76#define CONFIG_BOOTP_BOOTFILESIZE
77#define CONFIG_BOOTP_BOOTPATH
78#define CONFIG_BOOTP_GATEWAY
79#define CONFIG_BOOTP_HOSTNAME
80
Jon Loeliger7f5c0152007-07-10 09:38:02 -050081/*
Jon Loeligerbc234c12007-07-04 22:32:51 -050082 * Command line configuration.
83 */
Jon Loeligerbc234c12007-07-04 22:32:51 -050084
Jon Loeliger7f5c0152007-07-10 09:38:02 -050085#if defined(CONFIG_PCI)
86#define CODFIG_CMD_PCI
87#endif
88
Heiko Schocher2605e902007-02-16 07:57:42 +010089/*
90 * Autobooting
91 */
Heiko Schocher2605e902007-02-16 07:57:42 +010092
93#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010094 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocher2605e902007-02-16 07:57:42 +010095 "echo"
96
97#undef CONFIG_BOOTARGS
98
99#define CONFIG_EXTRA_ENV_SETTINGS \
100 "netdev=eth0\0" \
101 "nfsargs=setenv bootargs root=/dev/nfs rw " \
102 "nfsroot=${serverip}:${rootpath}\0" \
103 "ramargs=setenv bootargs root=/dev/ram rw\0" \
104 "addip=setenv bootargs ${bootargs} " \
105 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
106 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100107 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100108 "bootm ${kernel_addr}\0" \
109 "flash_self=run ramargs addip;" \
110 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100111 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher8502e302007-03-13 09:40:59 +0100112 "${baudrate}\0" \
113 "contyp=ttyS0\0" \
Wolfgang Denka7090b92007-03-13 16:05:55 +0100114 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher8502e302007-03-13 09:40:59 +0100115 "bootm\0" \
116 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocher2605e902007-02-16 07:57:42 +0100117 "bootfile=/tftpboot/jupiter/uImage\0" \
118 ""
119
120#define CONFIG_BOOTCOMMAND "run flash_self"
121
122/*
123 * IPB Bus clocking configuration.
124 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocher2605e902007-02-16 07:57:42 +0100126
127#if 0
128/* pass open firmware flat tree */
Heiko Schocher2605e902007-02-16 07:57:42 +0100129#define OF_CPU "PowerPC,5200@0"
130#define OF_SOC "soc5200@f0000000"
131#define OF_TBCLK (bd->bi_busfreq / 8)
132#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
133#endif
134
135#if 0
136/*
137 * I2C configuration
138 */
139#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Heiko Schocher2605e902007-02-16 07:57:42 +0100141
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
143#define CONFIG_SYS_I2C_SLAVE 0x7F
Heiko Schocher2605e902007-02-16 07:57:42 +0100144
145/*
146 * EEPROM configuration
147 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
149#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
150#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
151#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
Heiko Schocher2605e902007-02-16 07:57:42 +0100152#endif
153
154/*
155 * Flash configuration
156 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200157#define CONFIG_SYS_FLASH_BASE 0xFF000000
158#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocher2605e902007-02-16 07:57:42 +0100159
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocher2605e902007-02-16 07:57:42 +0100161
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200162#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocher2605e902007-02-16 07:57:42 +0100163
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
165#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocher2605e902007-02-16 07:57:42 +0100166
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocher2605e902007-02-16 07:57:42 +0100168
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200169#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_FLASH_CFI
171#define CONFIG_SYS_FLASH_EMPTY_INFO
172#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
173#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
174#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100175
176/*
177 * Environment settings
178 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200179#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200180#define CONFIG_ENV_SIZE 0x20000
181#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocher2605e902007-02-16 07:57:42 +0100182#define CONFIG_ENV_OVERWRITE 1
183
Heiko Schocher8502e302007-03-13 09:40:59 +0100184/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200185#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
186#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher8502e302007-03-13 09:40:59 +0100187
Heiko Schocher2605e902007-02-16 07:57:42 +0100188/*
189 * Memory map
190 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_MBAR 0xF0000000
192#define CONFIG_SYS_SDRAM_BASE 0x00000000
193#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocher2605e902007-02-16 07:57:42 +0100194
195/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200196#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200197#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocher2605e902007-02-16 07:57:42 +0100198
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200199#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocher2605e902007-02-16 07:57:42 +0100201
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200202#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
204# define CONFIG_SYS_RAMBOOT 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100205#endif
206
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
208#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
209#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocher2605e902007-02-16 07:57:42 +0100210
211/*
212 * Ethernet configuration
213 */
214#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800215#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocher2605e902007-02-16 07:57:42 +0100216/*
Ben Warren86321fc2009-02-05 23:58:25 -0800217 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocher2605e902007-02-16 07:57:42 +0100218 */
Ben Warren86321fc2009-02-05 23:58:25 -0800219/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocher2605e902007-02-16 07:57:42 +0100220#define CONFIG_PHY_ADDR 0x00
221
222/*
223 * GPIO configuration
224 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200225#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocher2605e902007-02-16 07:57:42 +0100226
227/*
228 * Miscellaneous configurable options
229 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher8502e302007-03-13 09:40:59 +0100231
232#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jon Loeligerbc234c12007-07-04 22:32:51 -0500233#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200234#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocher2605e902007-02-16 07:57:42 +0100235#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocher2605e902007-02-16 07:57:42 +0100237#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
239#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
240#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocher2605e902007-02-16 07:57:42 +0100241
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
243#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
244#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocher2605e902007-02-16 07:57:42 +0100245
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200246#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocher2605e902007-02-16 07:57:42 +0100247
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerbc234c12007-07-04 22:32:51 -0500249#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerbc234c12007-07-04 22:32:51 -0500251#endif
252
Heiko Schocher2605e902007-02-16 07:57:42 +0100253/*
254 * Various low-level settings
255 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200256#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
257#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocher2605e902007-02-16 07:57:42 +0100258
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
260#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
261#define CONFIG_SYS_BOOTCS_CFG 0x00047801
262#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
263#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocher2605e902007-02-16 07:57:42 +0100264
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200265#define CONFIG_SYS_CS_BURST 0x00000000
266#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocher2605e902007-02-16 07:57:42 +0100267
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocher2605e902007-02-16 07:57:42 +0100269
270#endif /* __CONFIG_H */