Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2009 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 4 | * Graeme Russ, <graeme.russ@gmail.com> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 5 | * |
| 6 | * (C) Copyright 2007 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 7 | * Daniel Hellstrom, Gaisler Research, <daniel@gaisler.com> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 8 | * |
| 9 | * (C) Copyright 2006 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 10 | * Detlev Zundel, DENX Software Engineering, <dzu@denx.de> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 11 | * |
| 12 | * (C) Copyright -2003 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 13 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 14 | * |
| 15 | * (C) Copyright 2002 |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 16 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 17 | * |
| 18 | * (C) Copyright 2001 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 19 | * Josh Huber, Mission Critical Linux, Inc, <huber@mclx.com> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file contains the high-level API for the interrupt sub-system |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 24 | * of the x86 port of U-Boot. Most of the functionality has been |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 25 | * shamelessly stolen from the leon2 / leon3 ports of U-Boot. |
| 26 | * Daniel Hellstrom, Detlev Zundel, Wolfgang Denk and Josh Huber are |
| 27 | * credited for the corresponding work on those ports. The original |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 28 | * interrupt handling routines for the x86 port were written by |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 29 | * Daniel Engström |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 30 | */ |
| 31 | |
| 32 | #include <common.h> |
| 33 | #include <asm/interrupt.h> |
| 34 | |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 35 | #if !CONFIG_IS_ENABLED(X86_64) |
| 36 | |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 37 | struct irq_action { |
| 38 | interrupt_handler_t *handler; |
| 39 | void *arg; |
| 40 | unsigned int count; |
| 41 | }; |
| 42 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 43 | static struct irq_action irq_handlers[SYS_NUM_IRQS] = { {0} }; |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 44 | static int spurious_irq_cnt; |
| 45 | static int spurious_irq; |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 46 | |
| 47 | void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg) |
| 48 | { |
| 49 | int status; |
| 50 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 51 | if (irq < 0 || irq >= SYS_NUM_IRQS) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 52 | printf("irq_install_handler: bad irq number %d\n", irq); |
| 53 | return; |
| 54 | } |
| 55 | |
| 56 | if (irq_handlers[irq].handler != NULL) |
| 57 | printf("irq_install_handler: 0x%08lx replacing 0x%08lx\n", |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 58 | (ulong) handler, |
| 59 | (ulong) irq_handlers[irq].handler); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 60 | |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 61 | status = disable_interrupts(); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 62 | |
Graeme Russ | 1c409bc | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 63 | irq_handlers[irq].handler = handler; |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 64 | irq_handlers[irq].arg = arg; |
| 65 | irq_handlers[irq].count = 0; |
| 66 | |
| 67 | unmask_irq(irq); |
| 68 | |
| 69 | if (status) |
| 70 | enable_interrupts(); |
| 71 | |
| 72 | return; |
| 73 | } |
| 74 | |
| 75 | void irq_free_handler(int irq) |
| 76 | { |
| 77 | int status; |
| 78 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 79 | if (irq < 0 || irq >= SYS_NUM_IRQS) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 80 | printf("irq_free_handler: bad irq number %d\n", irq); |
| 81 | return; |
| 82 | } |
| 83 | |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 84 | status = disable_interrupts(); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 85 | |
| 86 | mask_irq(irq); |
| 87 | |
| 88 | irq_handlers[irq].handler = NULL; |
| 89 | irq_handlers[irq].arg = NULL; |
| 90 | |
| 91 | if (status) |
| 92 | enable_interrupts(); |
| 93 | |
| 94 | return; |
| 95 | } |
| 96 | |
Graeme Russ | 564a998 | 2009-11-24 20:04:18 +1100 | [diff] [blame] | 97 | void do_irq(int hw_irq) |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 98 | { |
Graeme Russ | 564a998 | 2009-11-24 20:04:18 +1100 | [diff] [blame] | 99 | int irq = hw_irq - 0x20; |
| 100 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 101 | if (irq < 0 || irq >= SYS_NUM_IRQS) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 102 | printf("do_irq: bad irq number %d\n", irq); |
| 103 | return; |
| 104 | } |
| 105 | |
| 106 | if (irq_handlers[irq].handler) { |
| 107 | mask_irq(irq); |
| 108 | |
| 109 | irq_handlers[irq].handler(irq_handlers[irq].arg); |
| 110 | irq_handlers[irq].count++; |
| 111 | |
| 112 | unmask_irq(irq); |
| 113 | specific_eoi(irq); |
| 114 | |
| 115 | } else { |
| 116 | if ((irq & 7) != 7) { |
| 117 | spurious_irq_cnt++; |
| 118 | spurious_irq = irq; |
| 119 | } |
| 120 | } |
| 121 | } |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 122 | #endif |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 123 | |
| 124 | #if defined(CONFIG_CMD_IRQ) |
Wolfgang Denk | 54841ab | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 125 | int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 126 | { |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 127 | #if !CONFIG_IS_ENABLED(X86_64) |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 128 | int irq; |
| 129 | |
| 130 | printf("Spurious IRQ: %u, last unknown IRQ: %d\n", |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 131 | spurious_irq_cnt, spurious_irq); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 132 | |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 133 | printf("Interrupt-Information:\n"); |
| 134 | printf("Nr Routine Arg Count\n"); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 135 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 136 | for (irq = 0; irq < SYS_NUM_IRQS; irq++) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 137 | if (irq_handlers[irq].handler != NULL) { |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 138 | printf("%02d %08lx %08lx %d\n", |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 139 | irq, |
| 140 | (ulong)irq_handlers[irq].handler, |
| 141 | (ulong)irq_handlers[irq].arg, |
| 142 | irq_handlers[irq].count); |
| 143 | } |
| 144 | } |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 145 | #endif |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | #endif |