blob: ab4242a77ea487cf17e68ae413d57a6c6c1a90e5 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <linux/compiler.h>
31#include <version.h>
32#include <environment.h>
33#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000034#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000035#if defined(CONFIG_CMD_IDE)
36#include <ide.h>
37#endif
38#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000039#include <initcall.h>
40#include <logbuff.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000041
42/* TODO: Can we move these into arch/ headers? */
43#ifdef CONFIG_8xx
44#include <mpc8xx.h>
45#endif
46#ifdef CONFIG_5xx
47#include <mpc5xx.h>
48#endif
49#ifdef CONFIG_MPC5xxx
50#include <mpc5xxx.h>
51#endif
52
Simon Glassa733b062013-04-26 02:53:43 +000053#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000054#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000055#include <spi.h>
Simon Glass71c52db2013-06-11 11:14:42 -070056#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000057#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000058#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000059#include <asm/io.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000060#ifdef CONFIG_MP
61#include <asm/mp.h>
62#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000063#include <asm/sections.h>
Simon Glass48a33802013-03-05 14:39:52 +000064#ifdef CONFIG_X86
65#include <asm/init_helpers.h>
66#include <asm/relocate.h>
67#endif
Simon Glassa733b062013-04-26 02:53:43 +000068#ifdef CONFIG_SANDBOX
69#include <asm/state.h>
70#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000071#include <linux/compiler.h>
72
73/*
74 * Pointer to initial global data area
75 *
76 * Here we initialize it if needed.
77 */
78#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
79#undef XTRN_DECLARE_GLOBAL_DATA_PTR
80#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
81DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
82#else
83DECLARE_GLOBAL_DATA_PTR;
84#endif
85
86/*
87 * sjg: IMO this code should be
88 * refactored to a single function, something like:
89 *
90 * void led_set_state(enum led_colour_t colour, int on);
91 */
92/************************************************************************
93 * Coloured LED functionality
94 ************************************************************************
95 * May be supplied by boards if desired
96 */
97inline void __coloured_LED_init(void) {}
98void coloured_LED_init(void)
99 __attribute__((weak, alias("__coloured_LED_init")));
100inline void __red_led_on(void) {}
101void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
102inline void __red_led_off(void) {}
103void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
104inline void __green_led_on(void) {}
105void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
106inline void __green_led_off(void) {}
107void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
108inline void __yellow_led_on(void) {}
109void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
110inline void __yellow_led_off(void) {}
111void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
112inline void __blue_led_on(void) {}
113void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
114inline void __blue_led_off(void) {}
115void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
116
117/*
118 * Why is gd allocated a register? Prior to reloc it might be better to
119 * just pass it around to each function in this file?
120 *
121 * After reloc one could argue that it is hardly used and doesn't need
122 * to be in a register. Or if it is it should perhaps hold pointers to all
123 * global data for all modules, so that post-reloc we can avoid the massive
124 * literal pool we get on ARM. Or perhaps just encourage each module to use
125 * a structure...
126 */
127
128/*
129 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
130 */
131
Simon Glasse4fef6c2013-03-11 14:30:42 +0000132#if defined(CONFIG_WATCHDOG)
133static int init_func_watchdog_init(void)
134{
135 puts(" Watchdog enabled\n");
136 WATCHDOG_RESET();
137
138 return 0;
139}
140
141int init_func_watchdog_reset(void)
142{
143 WATCHDOG_RESET();
144
145 return 0;
146}
147#endif /* CONFIG_WATCHDOG */
148
149void __board_add_ram_info(int use_default)
150{
151 /* please define platform specific board_add_ram_info() */
152}
153
154void board_add_ram_info(int)
155 __attribute__ ((weak, alias("__board_add_ram_info")));
156
Simon Glass1938f4a2013-03-11 06:49:53 +0000157static int init_baud_rate(void)
158{
159 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
160 return 0;
161}
162
163static int display_text_info(void)
164{
Simon Glassa733b062013-04-26 02:53:43 +0000165#ifndef CONFIG_SANDBOX
Simon Glass1938f4a2013-03-11 06:49:53 +0000166 ulong bss_start, bss_end;
167
Simon Glass632efa72013-03-11 07:06:48 +0000168#ifdef CONFIG_SYS_SYM_OFFSETS
Simon Glass1938f4a2013-03-11 06:49:53 +0000169 bss_start = _bss_start_ofs + _TEXT_BASE;
170 bss_end = _bss_end_ofs + _TEXT_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000171#else
172 bss_start = (ulong)&__bss_start;
173 bss_end = (ulong)&__bss_end;
174#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000175 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
176 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000177#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000178
179#ifdef CONFIG_MODEM_SUPPORT
180 debug("Modem Support enabled\n");
181#endif
182#ifdef CONFIG_USE_IRQ
183 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
184 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
185#endif
186
187 return 0;
188}
189
190static int announce_dram_init(void)
191{
192 puts("DRAM: ");
193 return 0;
194}
195
Simon Glasse4fef6c2013-03-11 14:30:42 +0000196#ifdef CONFIG_PPC
197static int init_func_ram(void)
198{
199#ifdef CONFIG_BOARD_TYPES
200 int board_type = gd->board_type;
201#else
202 int board_type = 0; /* use dummy arg */
203#endif
204
205 gd->ram_size = initdram(board_type);
206
207 if (gd->ram_size > 0)
208 return 0;
209
210 puts("*** failed ***\n");
211 return 1;
212}
213#endif
214
Simon Glass1938f4a2013-03-11 06:49:53 +0000215static int show_dram_config(void)
216{
217 ulong size;
218
219#ifdef CONFIG_NR_DRAM_BANKS
220 int i;
221
222 debug("\nRAM Configuration:\n");
223 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
224 size += gd->bd->bi_dram[i].size;
225 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
226#ifdef DEBUG
227 print_size(gd->bd->bi_dram[i].size, "\n");
228#endif
229 }
230 debug("\nDRAM: ");
231#else
232 size = gd->ram_size;
233#endif
234
Simon Glasse4fef6c2013-03-11 14:30:42 +0000235 print_size(size, "");
236 board_add_ram_info(0);
237 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000238
239 return 0;
240}
241
Simon Glasse4fef6c2013-03-11 14:30:42 +0000242ulong get_effective_memsize(void)
243{
244#ifndef CONFIG_VERY_BIG_RAM
245 return gd->ram_size;
246#else
247 /* limit stack to what we can reasonable map */
248 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
249 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
250#endif
251}
252
Simon Glass1938f4a2013-03-11 06:49:53 +0000253void __dram_init_banksize(void)
254{
255#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
256 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
257 gd->bd->bi_dram[0].size = get_effective_memsize();
258#endif
259}
260
261void dram_init_banksize(void)
262 __attribute__((weak, alias("__dram_init_banksize")));
263
Simon Glasse4fef6c2013-03-11 14:30:42 +0000264#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
265static int init_func_i2c(void)
266{
267 puts("I2C: ");
268 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
269 puts("ready\n");
270 return 0;
271}
272#endif
273
274#if defined(CONFIG_HARD_SPI)
275static int init_func_spi(void)
276{
277 puts("SPI: ");
278 spi_init();
279 puts("ready\n");
280 return 0;
281}
282#endif
283
284__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000285static int zero_global_data(void)
286{
287 memset((void *)gd, '\0', sizeof(gd_t));
288
289 return 0;
290}
291
292static int setup_mon_len(void)
293{
Simon Glass632efa72013-03-11 07:06:48 +0000294#ifdef CONFIG_SYS_SYM_OFFSETS
Simon Glass1938f4a2013-03-11 06:49:53 +0000295 gd->mon_len = _bss_end_ofs;
Simon Glassa733b062013-04-26 02:53:43 +0000296#elif defined(CONFIG_SANDBOX)
297 gd->mon_len = (ulong)&_end - (ulong)_init;
Simon Glass632efa72013-03-11 07:06:48 +0000298#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000299 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
300 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000301#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000302 return 0;
303}
304
305__weak int arch_cpu_init(void)
306{
307 return 0;
308}
309
Simon Glassf828bf22013-04-20 08:42:41 +0000310#ifdef CONFIG_OF_HOSTFILE
311
312#define CHECK(x) err = (x); if (err) goto failed;
313
314/* Create an empty device tree blob */
315static int make_empty_fdt(void *fdt)
316{
317 int err;
318
319 CHECK(fdt_create(fdt, 256));
320 CHECK(fdt_finish_reservemap(fdt));
321 CHECK(fdt_begin_node(fdt, ""));
322 CHECK(fdt_end_node(fdt));
323 CHECK(fdt_finish(fdt));
324
325 return 0;
326failed:
327 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
328 return -EACCES;
329}
330
331static int read_fdt_from_file(void)
332{
333 struct sandbox_state *state = state_get_current();
334 void *blob;
335 int size;
336 int err;
337
338 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
339 if (!state->fdt_fname) {
340 err = make_empty_fdt(blob);
341 if (!err)
342 goto done;
343 return err;
344 }
345 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
346 if (err)
347 return err;
348 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
349 if (size < 0)
350 return -EIO;
351
352done:
353 gd->fdt_blob = blob;
354
355 return 0;
356}
357#endif
358
Simon Glassa733b062013-04-26 02:53:43 +0000359#ifdef CONFIG_SANDBOX
360static int setup_ram_buf(void)
361{
362 gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE);
363 assert(gd->arch.ram_buf);
364 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
365
366 return 0;
367}
368#endif
369
Simon Glass1938f4a2013-03-11 06:49:53 +0000370static int setup_fdt(void)
371{
372#ifdef CONFIG_OF_EMBED
373 /* Get a pointer to the FDT */
374 gd->fdt_blob = _binary_dt_dtb_start;
375#elif defined CONFIG_OF_SEPARATE
376 /* FDT is at end of image */
Simon Glass632efa72013-03-11 07:06:48 +0000377# ifdef CONFIG_SYS_SYM_OFFSETS
Simon Glass1938f4a2013-03-11 06:49:53 +0000378 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
Simon Glass632efa72013-03-11 07:06:48 +0000379# else
380 gd->fdt_blob = (ulong *)&_end;
381# endif
Simon Glassf828bf22013-04-20 08:42:41 +0000382#elif defined(CONFIG_OF_HOSTFILE)
383 if (read_fdt_from_file()) {
384 puts("Failed to read control FDT\n");
385 return -1;
386 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000387#endif
388 /* Allow the early environment to override the fdt address */
389 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
390 (uintptr_t)gd->fdt_blob);
391 return 0;
392}
393
394/* Get the top of usable RAM */
395__weak ulong board_get_usable_ram_top(ulong total_size)
396{
397 return gd->ram_top;
398}
399
400static int setup_dest_addr(void)
401{
402 debug("Monitor len: %08lX\n", gd->mon_len);
403 /*
404 * Ram is setup, size stored in gd !!
405 */
406 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
407#if defined(CONFIG_SYS_MEM_TOP_HIDE)
408 /*
409 * Subtract specified amount of memory to hide so that it won't
410 * get "touched" at all by U-Boot. By fixing up gd->ram_size
411 * the Linux kernel should now get passed the now "corrected"
412 * memory size and won't touch it either. This should work
413 * for arch/ppc and arch/powerpc. Only Linux board ports in
414 * arch/powerpc with bootwrapper support, that recalculate the
415 * memory size from the SDRAM controller setup will have to
416 * get fixed.
417 */
418 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
419#endif
420#ifdef CONFIG_SYS_SDRAM_BASE
421 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
422#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000423 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000424 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000425 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000426 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000427#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
428 /*
429 * We need to make sure the location we intend to put secondary core
430 * boot code is reserved and not used by any part of u-boot
431 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000432 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
433 gd->relocaddr = determine_mp_bootpg(NULL);
434 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000435 }
436#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000437 return 0;
438}
439
440#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
441static int reserve_logbuffer(void)
442{
443 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000444 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000445 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000446 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000447 return 0;
448}
449#endif
450
451#ifdef CONFIG_PRAM
452/* reserve protected RAM */
453static int reserve_pram(void)
454{
455 ulong reg;
456
457 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000458 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000459 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000460 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000461 return 0;
462}
463#endif /* CONFIG_PRAM */
464
465/* Round memory pointer down to next 4 kB limit */
466static int reserve_round_4k(void)
467{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000468 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000469 return 0;
470}
471
472#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
473 defined(CONFIG_ARM)
474static int reserve_mmu(void)
475{
476 /* reserve TLB table */
477 gd->arch.tlb_size = 4096 * 4;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000478 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000479
480 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000481 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000482
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000483 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000484 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
485 gd->arch.tlb_addr + gd->arch.tlb_size);
486 return 0;
487}
488#endif
489
490#ifdef CONFIG_LCD
491static int reserve_lcd(void)
492{
493#ifdef CONFIG_FB_ADDR
494 gd->fb_base = CONFIG_FB_ADDR;
495#else
496 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000497 gd->relocaddr = lcd_setmem(gd->relocaddr);
498 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000499#endif /* CONFIG_FB_ADDR */
500 return 0;
501}
502#endif /* CONFIG_LCD */
503
Simon Glass71c52db2013-06-11 11:14:42 -0700504static int reserve_trace(void)
505{
506#ifdef CONFIG_TRACE
507 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
508 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
509 debug("Reserving %dk for trace data at: %08lx\n",
510 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
511#endif
512
513 return 0;
514}
515
Simon Glasse4fef6c2013-03-11 14:30:42 +0000516#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
Simon Glass48a33802013-03-05 14:39:52 +0000517 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000518static int reserve_video(void)
519{
520 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000521 gd->relocaddr = video_setmem(gd->relocaddr);
522 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000523
524 return 0;
525}
526#endif
527
Simon Glass1938f4a2013-03-11 06:49:53 +0000528static int reserve_uboot(void)
529{
530 /*
531 * reserve memory for U-Boot code, data & bss
532 * round down to next 4 kB limit
533 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000534 gd->relocaddr -= gd->mon_len;
535 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000536#ifdef CONFIG_E500
537 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000538 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000539#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000540
541 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000542 gd->relocaddr);
543
544 gd->start_addr_sp = gd->relocaddr;
545
Simon Glass1938f4a2013-03-11 06:49:53 +0000546 return 0;
547}
548
Simon Glass8cae8a62013-03-05 14:39:45 +0000549#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000550/* reserve memory for malloc() area */
551static int reserve_malloc(void)
552{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000553 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000554 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000555 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000556 return 0;
557}
558
559/* (permanently) allocate a Board Info struct */
560static int reserve_board(void)
561{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000562 gd->start_addr_sp -= sizeof(bd_t);
563 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000564 memset(gd->bd, '\0', sizeof(bd_t));
565 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000566 sizeof(bd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000567 return 0;
568}
Simon Glass8cae8a62013-03-05 14:39:45 +0000569#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000570
571static int setup_machine(void)
572{
573#ifdef CONFIG_MACH_TYPE
574 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
575#endif
576 return 0;
577}
578
579static int reserve_global_data(void)
580{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000581 gd->start_addr_sp -= sizeof(gd_t);
582 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000583 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000584 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000585 return 0;
586}
587
588static int reserve_fdt(void)
589{
590 /*
591 * If the device tree is sitting immediate above our image then we
592 * must relocate it. If it is embedded in the data section, then it
593 * will be relocated with other data.
594 */
595 if (gd->fdt_blob) {
596 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
597
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000598 gd->start_addr_sp -= gd->fdt_size;
599 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000600 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000601 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000602 }
603
604 return 0;
605}
606
607static int reserve_stacks(void)
608{
Simon Glass8cae8a62013-03-05 14:39:45 +0000609#ifdef CONFIG_SPL_BUILD
610# ifdef CONFIG_ARM
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000611 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
612 gd->irq_sp = gd->start_addr_sp;
Simon Glass8cae8a62013-03-05 14:39:45 +0000613# endif
614#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000615# ifdef CONFIG_PPC
616 ulong *s;
617# endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000618
Simon Glass1938f4a2013-03-11 06:49:53 +0000619 /* setup stack pointer for exceptions */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000620 gd->start_addr_sp -= 16;
621 gd->start_addr_sp &= ~0xf;
622 gd->irq_sp = gd->start_addr_sp;
Simon Glass1938f4a2013-03-11 06:49:53 +0000623
624 /*
625 * Handle architecture-specific things here
626 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
627 * to handle this and put in arch/xxx/lib/stack.c
628 */
629# ifdef CONFIG_ARM
630# ifdef CONFIG_USE_IRQ
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000631 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
Simon Glass1938f4a2013-03-11 06:49:53 +0000632 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000633 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000634
635 /* 8-byte alignment for ARM ABI compliance */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000636 gd->start_addr_sp &= ~0x07;
Simon Glass1938f4a2013-03-11 06:49:53 +0000637# endif
638 /* leave 3 words for abort-stack, plus 1 for alignment */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000639 gd->start_addr_sp -= 16;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000640# elif defined(CONFIG_PPC)
641 /* Clear initial stack frame */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000642 s = (ulong *) gd->start_addr_sp;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000643 *s = 0; /* Terminate back chain */
644 *++s = 0; /* NULL return address */
Simon Glass8cae8a62013-03-05 14:39:45 +0000645# endif /* Architecture specific code */
Simon Glass1938f4a2013-03-11 06:49:53 +0000646
647 return 0;
Simon Glass8cae8a62013-03-05 14:39:45 +0000648#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000649}
650
651static int display_new_sp(void)
652{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000653 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000654
655 return 0;
656}
657
Simon Glasse4fef6c2013-03-11 14:30:42 +0000658#ifdef CONFIG_PPC
659static int setup_board_part1(void)
660{
661 bd_t *bd = gd->bd;
662
663 /*
664 * Save local variables to board info struct
665 */
666
667 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
668 bd->bi_memsize = gd->ram_size; /* size in bytes */
669
670#ifdef CONFIG_SYS_SRAM_BASE
671 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
672 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
673#endif
674
675#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
676 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
677 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
678#endif
679#if defined(CONFIG_MPC5xxx)
680 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
681#endif
682#if defined(CONFIG_MPC83xx)
683 bd->bi_immrbar = CONFIG_SYS_IMMR;
684#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000685
686 return 0;
687}
688
689static int setup_board_part2(void)
690{
691 bd_t *bd = gd->bd;
692
693 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
694 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
695#if defined(CONFIG_CPM2)
696 bd->bi_cpmfreq = gd->arch.cpm_clk;
697 bd->bi_brgfreq = gd->arch.brg_clk;
698 bd->bi_sccfreq = gd->arch.scc_clk;
699 bd->bi_vco = gd->arch.vco_out;
700#endif /* CONFIG_CPM2 */
701#if defined(CONFIG_MPC512X)
702 bd->bi_ipsfreq = gd->arch.ips_clk;
703#endif /* CONFIG_MPC512X */
704#if defined(CONFIG_MPC5xxx)
705 bd->bi_ipbfreq = gd->arch.ipb_clk;
706 bd->bi_pcifreq = gd->pci_clk;
707#endif /* CONFIG_MPC5xxx */
708
709 return 0;
710}
711#endif
712
713#ifdef CONFIG_SYS_EXTBDINFO
714static int setup_board_extra(void)
715{
716 bd_t *bd = gd->bd;
717
718 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
719 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
720 sizeof(bd->bi_r_version));
721
722 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
723 bd->bi_plb_busfreq = gd->bus_clk;
724#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
725 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
726 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
727 bd->bi_pci_busfreq = get_PCI_freq();
728 bd->bi_opbfreq = get_OPB_freq();
729#elif defined(CONFIG_XILINX_405)
730 bd->bi_pci_busfreq = get_PCI_freq();
731#endif
732
733 return 0;
734}
735#endif
736
Simon Glass1938f4a2013-03-11 06:49:53 +0000737#ifdef CONFIG_POST
738static int init_post(void)
739{
740 post_bootmode_init();
741 post_run(NULL, POST_ROM | post_bootmode_get(0));
742
743 return 0;
744}
745#endif
746
747static int setup_baud_rate(void)
748{
749 /* Ick, can we get rid of this line? */
750 gd->bd->bi_baudrate = gd->baudrate;
751
752 return 0;
753}
754
755static int setup_dram_config(void)
756{
757 /* Ram is board specific, so move it to board code ... */
758 dram_init_banksize();
759
760 return 0;
761}
762
763static int reloc_fdt(void)
764{
765 if (gd->new_fdt) {
766 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
767 gd->fdt_blob = gd->new_fdt;
768 }
769
770 return 0;
771}
772
773static int setup_reloc(void)
774{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000775 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000776 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
777
778 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000779 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000780 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
781 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000782
783 return 0;
784}
785
786/* ARM calls relocate_code from its crt0.S */
787#if !defined(CONFIG_ARM)
788
789static int jump_to_copy(void)
790{
Simon Glass48a33802013-03-05 14:39:52 +0000791 /*
792 * x86 is special, but in a nice way. It uses a trampoline which
793 * enables the dcache if possible.
794 *
795 * For now, other archs use relocate_code(), which is implemented
796 * similarly for all archs. When we do generic relocation, hopefully
797 * we can make all archs enable the dcache prior to relocation.
798 */
799#ifdef CONFIG_X86
800 /*
801 * SDRAM and console are now initialised. The final stack can now
802 * be setup in SDRAM. Code execution will continue in Flash, but
803 * with the stack in SDRAM and Global Data in temporary memory
804 * (CPU cache)
805 */
806 board_init_f_r_trampoline(gd->start_addr_sp);
Simon Glassa733b062013-04-26 02:53:43 +0000807#elif defined(CONFIG_SANDBOX)
808 board_init_r(gd->new_gd, 0);
Simon Glass48a33802013-03-05 14:39:52 +0000809#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000810 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000811#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000812
813 return 0;
814}
815#endif
816
817/* Record the board_init_f() bootstage (after arch_cpu_init()) */
818static int mark_bootstage(void)
819{
820 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
821
822 return 0;
823}
824
825static init_fnc_t init_sequence_f[] = {
Simon Glasse4fef6c2013-03-11 14:30:42 +0000826#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
827 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
Simon Glass7525c2d2013-04-15 11:25:20 +0000828 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
Simon Glass632efa72013-03-11 07:06:48 +0000829 zero_global_data,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000830#endif
Simon Glassa733b062013-04-26 02:53:43 +0000831#ifdef CONFIG_SANDBOX
832 setup_ram_buf,
833#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000834 setup_mon_len,
Simon Glass71c52db2013-06-11 11:14:42 -0700835 setup_fdt,
836 trace_early_init,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000837#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
838 /* TODO: can this go into arch_cpu_init()? */
839 probecpu,
840#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000841 arch_cpu_init, /* basic arch cpu dependent setup */
Simon Glass48a33802013-03-05 14:39:52 +0000842#ifdef CONFIG_X86
843 cpu_init_f, /* TODO(sjg@chromium.org): remove */
844# ifdef CONFIG_OF_CONTROL
845 find_fdt, /* TODO(sjg@chromium.org): remove */
846# endif
847#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000848 mark_bootstage,
849#ifdef CONFIG_OF_CONTROL
850 fdtdec_check_fdt,
851#endif
852#if defined(CONFIG_BOARD_EARLY_INIT_F)
853 board_early_init_f,
854#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000855 /* TODO: can any of this go into arch_cpu_init()? */
856#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
857 get_clocks, /* get CPU and bus clocks (etc.) */
858#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
859 && !defined(CONFIG_TQM885D)
860 adjust_sdram_tbs_8xx,
861#endif
862 /* TODO: can we rename this to timer_init()? */
863 init_timebase,
864#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000865#ifdef CONFIG_ARM
Simon Glass1938f4a2013-03-11 06:49:53 +0000866 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000867#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000868#ifdef CONFIG_SYS_ALLOC_DPRAM
869#if !defined(CONFIG_CPM2)
870 dpram_init,
871#endif
872#endif
873#if defined(CONFIG_BOARD_POSTCLK_INIT)
874 board_postclk_init,
875#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000876#ifdef CONFIG_FSL_ESDHC
877 get_clocks,
878#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000879 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000880#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
881 /* get CPU and bus clocks according to the environment variable */
882 get_clocks_866,
883 /* adjust sdram refresh rate according to the new clock */
884 sdram_adjust_866,
885 init_timebase,
886#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000887 init_baud_rate, /* initialze baudrate settings */
888 serial_init, /* serial communications setup */
889 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000890#ifdef CONFIG_SANDBOX
891 sandbox_early_getopt_check,
892#endif
893#ifdef CONFIG_OF_CONTROL
894 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000895#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000896 display_options, /* say that we are here */
897 display_text_info, /* show debugging info if required */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000898#if defined(CONFIG_8260)
899 prt_8260_rsr,
900 prt_8260_clks,
901#endif /* CONFIG_8260 */
902#if defined(CONFIG_MPC83xx)
903 prt_83xx_rsr,
904#endif
905#ifdef CONFIG_PPC
906 checkcpu,
907#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000908#if defined(CONFIG_DISPLAY_CPUINFO)
909 print_cpuinfo, /* display cpu info (and speed) */
910#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000911#if defined(CONFIG_MPC5xxx)
912 prt_mpc5xxx_clks,
913#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000914#if defined(CONFIG_DISPLAY_BOARDINFO)
915 checkboard, /* display board info */
916#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000917 INIT_FUNC_WATCHDOG_INIT
918#if defined(CONFIG_MISC_INIT_F)
919 misc_init_f,
920#endif
921 INIT_FUNC_WATCHDOG_RESET
922#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
923 init_func_i2c,
924#endif
925#if defined(CONFIG_HARD_SPI)
926 init_func_spi,
927#endif
928#ifdef CONFIG_X86
929 dram_init_f, /* configure available RAM banks */
Simon Glass8b42dfc2013-04-15 11:22:49 +0000930 calculate_relocation_address,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000931#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000932 announce_dram_init,
933 /* TODO: unify all these dram functions? */
934#ifdef CONFIG_ARM
935 dram_init, /* configure available RAM banks */
936#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000937#ifdef CONFIG_PPC
938 init_func_ram,
939#endif
940#ifdef CONFIG_POST
941 post_init_f,
942#endif
943 INIT_FUNC_WATCHDOG_RESET
944#if defined(CONFIG_SYS_DRAM_TEST)
945 testdram,
946#endif /* CONFIG_SYS_DRAM_TEST */
947 INIT_FUNC_WATCHDOG_RESET
948
Simon Glass1938f4a2013-03-11 06:49:53 +0000949#ifdef CONFIG_POST
950 init_post,
951#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000952 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000953 /*
954 * Now that we have DRAM mapped and working, we can
955 * relocate the code and continue running from DRAM.
956 *
957 * Reserve memory at end of RAM for (top down in that order):
958 * - area that won't get touched by U-Boot and Linux (optional)
959 * - kernel log buffer
960 * - protected RAM
961 * - LCD framebuffer
962 * - monitor code
963 * - board info struct
964 */
965 setup_dest_addr,
966#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
967 reserve_logbuffer,
968#endif
969#ifdef CONFIG_PRAM
970 reserve_pram,
971#endif
972 reserve_round_4k,
973#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
974 defined(CONFIG_ARM)
975 reserve_mmu,
976#endif
977#ifdef CONFIG_LCD
978 reserve_lcd,
979#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700980 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000981 /* TODO: Why the dependency on CONFIG_8xx? */
982#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
Simon Glass48a33802013-03-05 14:39:52 +0000983 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000984 reserve_video,
985#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000986 reserve_uboot,
Simon Glass8cae8a62013-03-05 14:39:45 +0000987#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000988 reserve_malloc,
989 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000990#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000991 setup_machine,
992 reserve_global_data,
993 reserve_fdt,
994 reserve_stacks,
995 setup_dram_config,
996 show_dram_config,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000997#ifdef CONFIG_PPC
998 setup_board_part1,
999 INIT_FUNC_WATCHDOG_RESET
1000 setup_board_part2,
1001#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001002 setup_baud_rate,
1003 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +00001004#ifdef CONFIG_SYS_EXTBDINFO
1005 setup_board_extra,
1006#endif
1007 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +00001008 reloc_fdt,
1009 setup_reloc,
1010#ifndef CONFIG_ARM
1011 jump_to_copy,
1012#endif
1013 NULL,
1014};
1015
1016void board_init_f(ulong boot_flags)
1017{
Simon Glass48a33802013-03-05 14:39:52 +00001018#ifndef CONFIG_X86
Simon Glass1938f4a2013-03-11 06:49:53 +00001019 gd_t data;
1020
1021 gd = &data;
Simon Glass48a33802013-03-05 14:39:52 +00001022#endif
Simon Glass1938f4a2013-03-11 06:49:53 +00001023
1024 gd->flags = boot_flags;
1025
1026 if (initcall_run_list(init_sequence_f))
1027 hang();
1028
1029#ifndef CONFIG_ARM
1030 /* NOTREACHED - jump_to_copy() does not return */
1031 hang();
1032#endif
1033}
1034
Simon Glass48a33802013-03-05 14:39:52 +00001035#ifdef CONFIG_X86
1036/*
1037 * For now this code is only used on x86.
1038 *
1039 * init_sequence_f_r is the list of init functions which are run when
1040 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1041 * The following limitations must be considered when implementing an
1042 * '_f_r' function:
1043 * - 'static' variables are read-only
1044 * - Global Data (gd->xxx) is read/write
1045 *
1046 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1047 * supported). It _should_, if possible, copy global data to RAM and
1048 * initialise the CPU caches (to speed up the relocation process)
1049 *
1050 * NOTE: At present only x86 uses this route, but it is intended that
1051 * all archs will move to this when generic relocation is implemented.
1052 */
1053static init_fnc_t init_sequence_f_r[] = {
1054 init_cache_f_r,
1055 copy_uboot_to_ram,
1056 clear_bss,
1057 do_elf_reloc_fixups,
1058
1059 NULL,
1060};
1061
1062void board_init_f_r(void)
1063{
1064 if (initcall_run_list(init_sequence_f_r))
1065 hang();
1066
1067 /*
1068 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1069 * Transfer execution from Flash to RAM by calculating the address
1070 * of the in-RAM copy of board_init_r() and calling it
1071 */
1072 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1073
1074 /* NOTREACHED - board_init_r() does not return */
1075 hang();
1076}
1077#endif /* CONFIG_X86 */