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Joseph Chen636ffbd2021-06-02 15:58:23 +08001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd
4 */
5
Quentin Schulz05713d52022-09-02 15:10:52 +02006#include "rockchip-u-boot.dtsi"
7
Joseph Chen636ffbd2021-06-02 15:58:23 +08008/ {
9 aliases {
10 mmc0 = &sdhci;
11 mmc1 = &sdmmc0;
Jonas Karlman52f6b962023-07-28 12:05:40 +000012 spi4 = &sfc;
Joseph Chen636ffbd2021-06-02 15:58:23 +080013 };
14
Nico Cheng6b97f2d2021-10-26 10:42:20 +080015 chosen {
Jonas Karlmanf40dcc72023-07-28 11:53:08 +000016 u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
Nico Cheng6b97f2d2021-10-26 10:42:20 +080017 };
18
Joseph Chen636ffbd2021-06-02 15:58:23 +080019 dmc: dmc {
20 compatible = "rockchip,rk3568-dmc";
Simon Glass8c103c32023-02-13 08:56:33 -070021 bootph-all;
Joseph Chen636ffbd2021-06-02 15:58:23 +080022 };
Jonas Karlman2eedb6d2023-02-22 22:44:41 +000023
Jonas Karlman320ffd02024-04-22 06:28:45 +000024 rng: rng@fe388000 {
25 compatible = "rockchip,cryptov2-rng";
26 reg = <0x0 0xfe388000 0x0 0x2000>;
27 };
28
Jonas Karlman2eedb6d2023-02-22 22:44:41 +000029 otp: nvmem@fe38c000 {
30 compatible = "rockchip,rk3568-otp";
31 reg = <0x0 0xfe38c000 0x0 0x4000>;
32 #address-cells = <1>;
33 #size-cells = <1>;
Jonas Karlman2eedb6d2023-02-22 22:44:41 +000034
35 cpu_id: id@a {
36 reg = <0x0a 0x10>;
37 };
38 };
Joseph Chen636ffbd2021-06-02 15:58:23 +080039};
40
Jonas Karlmandc27b4a2023-05-17 18:26:29 +000041&xin24m {
42 bootph-all;
Jonas Karlmandc27b4a2023-05-17 18:26:29 +000043};
44
Joseph Chen636ffbd2021-06-02 15:58:23 +080045&cru {
Simon Glass8c103c32023-02-13 08:56:33 -070046 bootph-all;
Joseph Chen636ffbd2021-06-02 15:58:23 +080047};
48
49&pmucru {
Simon Glass8c103c32023-02-13 08:56:33 -070050 bootph-all;
Joseph Chen636ffbd2021-06-02 15:58:23 +080051};
52
53&grf {
Simon Glass8c103c32023-02-13 08:56:33 -070054 bootph-all;
Joseph Chen636ffbd2021-06-02 15:58:23 +080055};
56
57&pmugrf {
Simon Glass8c103c32023-02-13 08:56:33 -070058 bootph-all;
Joseph Chen636ffbd2021-06-02 15:58:23 +080059};
Nico Cheng6b97f2d2021-10-26 10:42:20 +080060
Jonas Karlmana3ef37a2023-07-28 11:53:07 +000061&pinctrl {
62 bootph-all;
63};
64
Jonas Karlmandd8d52c2023-08-03 21:11:54 +000065&pcfg_pull_none_smt {
66 bootph-all;
67};
68
Jonas Karlmana3ef37a2023-07-28 11:53:07 +000069&pcfg_pull_none {
70 bootph-all;
71};
72
73&pcfg_pull_up_drv_level_2 {
74 bootph-all;
75};
76
77&pcfg_pull_up {
78 bootph-all;
79};
80
81&emmc_bus8 {
82 bootph-all;
83};
84
85&emmc_clk {
86 bootph-all;
87};
88
89&emmc_cmd {
90 bootph-all;
91};
92
93&emmc_datastrobe {
94 bootph-all;
95};
96
97&emmc_rstnout {
98 bootph-all;
99};
100
101&fspi_pins {
102 bootph-all;
103};
104
Jonas Karlmandd8d52c2023-08-03 21:11:54 +0000105&i2c0_xfer {
106 bootph-all;
107};
108
Jonas Karlmana3ef37a2023-07-28 11:53:07 +0000109&sdmmc0_bus4 {
110 bootph-all;
111};
112
113&sdmmc0_clk {
114 bootph-all;
115};
116
117&sdmmc0_cmd {
118 bootph-all;
119};
120
121&sdmmc0_det {
122 bootph-all;
123};
124
125&sdmmc0_pwren {
126 bootph-all;
127};
128
129&uart2m0_xfer {
130 bootph-all;
131};
132
FUKAUMI Naoki85a8ef12022-10-04 01:30:30 +0000133&sdhci {
Simon Glass8c103c32023-02-13 08:56:33 -0700134 bootph-pre-ram;
Jonas Karlman520fece2023-08-04 09:34:01 +0000135 max-frequency = <200000000>;
FUKAUMI Naoki85a8ef12022-10-04 01:30:30 +0000136};
137
Nico Cheng6b97f2d2021-10-26 10:42:20 +0800138&sdmmc0 {
Simon Glass8c103c32023-02-13 08:56:33 -0700139 bootph-pre-ram;
Nico Cheng6b97f2d2021-10-26 10:42:20 +0800140};
Jonas Karlman64f79f82023-05-17 18:26:35 +0000141
Jonas Karlman473e54e2024-01-26 22:14:51 +0000142&uart2 {
143 bootph-pre-ram;
144 clock-frequency = <24000000>;
145};
146
Jonas Karlman64f79f82023-05-17 18:26:35 +0000147#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
148&binman {
149 simple-bin-spi {
150 mkimage {
151 args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
152 offset = <0x8000>;
153 };
154 };
155};
156#endif