wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000, 2001 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 8 | /* |
| 9 | * Support for read and write access to EEPROM like memory devices. This |
| 10 | * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM). |
| 11 | * FRAM devices read and write data at bus speed. In particular, there is no |
Peter Meerwald | e506a00 | 2012-02-08 05:31:53 +0000 | [diff] [blame] | 12 | * write delay. Also, there is no limit imposed on the number of bytes that can |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 13 | * be transferred with a single read or write. |
Wolfgang Denk | 6617aae | 2005-08-19 00:46:54 +0200 | [diff] [blame] | 14 | * |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 15 | * Use the following configuration options to ensure no unneeded performance |
| 16 | * degradation (typical for EEPROM) is incured for FRAM memory: |
Wolfgang Denk | 6617aae | 2005-08-19 00:46:54 +0200 | [diff] [blame] | 17 | * |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 18 | * #define CONFIG_SYS_I2C_FRAM |
| 19 | * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 20 | * |
| 21 | */ |
| 22 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 23 | #include <common.h> |
| 24 | #include <config.h> |
| 25 | #include <command.h> |
| 26 | #include <i2c.h> |
| 27 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 28 | extern void eeprom_init (void); |
| 29 | extern int eeprom_read (unsigned dev_addr, unsigned offset, |
| 30 | uchar *buffer, unsigned cnt); |
| 31 | extern int eeprom_write (unsigned dev_addr, unsigned offset, |
| 32 | uchar *buffer, unsigned cnt); |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 33 | #if defined(CONFIG_SYS_EEPROM_WREN) |
Stefan Roese | 98f4a3d | 2005-09-22 09:04:17 +0200 | [diff] [blame] | 34 | extern int eeprom_write_enable (unsigned dev_addr, int state); |
| 35 | #endif |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 36 | |
| 37 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 38 | #if defined(CONFIG_SYS_EEPROM_X40430) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 39 | /* Maximum number of times to poll for acknowledge after write */ |
| 40 | #define MAX_ACKNOWLEDGE_POLLS 10 |
| 41 | #endif |
| 42 | |
| 43 | /* ------------------------------------------------------------------------- */ |
| 44 | |
Jon Loeliger | baa26db | 2007-07-08 17:51:39 -0500 | [diff] [blame] | 45 | #if defined(CONFIG_CMD_EEPROM) |
Wolfgang Denk | 54841ab | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 46 | int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 47 | { |
| 48 | const char *const fmt = |
| 49 | "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; |
| 50 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 52 | if (argc == 6) { |
| 53 | ulong dev_addr = simple_strtoul (argv[2], NULL, 16); |
| 54 | ulong addr = simple_strtoul (argv[3], NULL, 16); |
| 55 | ulong off = simple_strtoul (argv[4], NULL, 16); |
| 56 | ulong cnt = simple_strtoul (argv[5], NULL, 16); |
| 57 | #else |
| 58 | if (argc == 5) { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR; |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 60 | ulong addr = simple_strtoul (argv[2], NULL, 16); |
| 61 | ulong off = simple_strtoul (argv[3], NULL, 16); |
| 62 | ulong cnt = simple_strtoul (argv[4], NULL, 16); |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 63 | #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */ |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 64 | |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 65 | # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 66 | eeprom_init (); |
| 67 | # endif /* !CONFIG_SPI */ |
| 68 | |
| 69 | if (strcmp (argv[1], "read") == 0) { |
| 70 | int rcode; |
| 71 | |
| 72 | printf (fmt, dev_addr, argv[1], addr, off, cnt); |
| 73 | |
| 74 | rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt); |
| 75 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 76 | puts ("done\n"); |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 77 | return rcode; |
| 78 | } else if (strcmp (argv[1], "write") == 0) { |
| 79 | int rcode; |
| 80 | |
| 81 | printf (fmt, dev_addr, argv[1], addr, off, cnt); |
| 82 | |
| 83 | rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt); |
| 84 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 85 | puts ("done\n"); |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 86 | return rcode; |
| 87 | } |
| 88 | } |
| 89 | |
Simon Glass | 4c12eeb | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 90 | return CMD_RET_USAGE; |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 91 | } |
Jon Loeliger | 9025317 | 2007-07-10 11:02:44 -0500 | [diff] [blame] | 92 | #endif |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 93 | |
| 94 | /*----------------------------------------------------------------------- |
| 95 | * |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 96 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 97 | * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM. |
| 98 | * |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 100 | * 0x00000nxx for EEPROM address selectors and page number at n. |
| 101 | */ |
| 102 | |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 103 | #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 104 | #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2 |
| 105 | #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2 |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 106 | #endif |
| 107 | #endif |
| 108 | |
| 109 | int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) |
| 110 | { |
| 111 | unsigned end = offset + cnt; |
| 112 | unsigned blk_off; |
| 113 | int rcode = 0; |
| 114 | |
| 115 | /* Read data until done or would cross a page boundary. |
| 116 | * We must write the address again when changing pages |
| 117 | * because the next page may be in a different device. |
| 118 | */ |
| 119 | while (offset < end) { |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 120 | unsigned alen, len; |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 121 | #if !defined(CONFIG_SYS_I2C_FRAM) |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 122 | unsigned maxlen; |
| 123 | #endif |
| 124 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 126 | uchar addr[2]; |
| 127 | |
| 128 | blk_off = offset & 0xFF; /* block offset */ |
| 129 | |
| 130 | addr[0] = offset >> 8; /* block number */ |
| 131 | addr[1] = blk_off; /* block offset */ |
| 132 | alen = 2; |
| 133 | #else |
| 134 | uchar addr[3]; |
| 135 | |
| 136 | blk_off = offset & 0xFF; /* block offset */ |
| 137 | |
| 138 | addr[0] = offset >> 16; /* block number */ |
| 139 | addr[1] = offset >> 8; /* upper address octet */ |
| 140 | addr[2] = blk_off; /* lower address octet */ |
| 141 | alen = 3; |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */ |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 143 | |
| 144 | addr[0] |= dev_addr; /* insert device address */ |
| 145 | |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 146 | len = end - offset; |
| 147 | |
| 148 | /* |
| 149 | * For a FRAM device there is no limit on the number of the |
| 150 | * bytes that can be ccessed with the single read or write |
| 151 | * operation. |
| 152 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 153 | #if !defined(CONFIG_SYS_I2C_FRAM) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 154 | maxlen = 0x100 - blk_off; |
| 155 | if (maxlen > I2C_RXTX_LEN) |
| 156 | maxlen = I2C_RXTX_LEN; |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 157 | if (len > maxlen) |
| 158 | len = maxlen; |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 159 | #endif |
| 160 | |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 161 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 162 | spi_read (addr, alen, buffer, len); |
| 163 | #else |
| 164 | if (i2c_read (addr[0], offset, alen-1, buffer, len) != 0) |
| 165 | rcode = 1; |
| 166 | #endif |
| 167 | buffer += len; |
| 168 | offset += len; |
| 169 | } |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 170 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 171 | return rcode; |
| 172 | } |
| 173 | |
| 174 | /*----------------------------------------------------------------------- |
| 175 | * |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 176 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 177 | * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM. |
| 178 | * |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 179 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 180 | * 0x00000nxx for EEPROM address selectors and page number at n. |
| 181 | */ |
| 182 | |
| 183 | int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) |
| 184 | { |
| 185 | unsigned end = offset + cnt; |
| 186 | unsigned blk_off; |
| 187 | int rcode = 0; |
| 188 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 189 | #if defined(CONFIG_SYS_EEPROM_X40430) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 190 | uchar contr_r_addr[2]; |
| 191 | uchar addr_void[2]; |
| 192 | uchar contr_reg[2]; |
| 193 | uchar ctrl_reg_v; |
| 194 | int i; |
| 195 | #endif |
| 196 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 197 | #if defined(CONFIG_SYS_EEPROM_WREN) |
Stefan Roese | 98f4a3d | 2005-09-22 09:04:17 +0200 | [diff] [blame] | 198 | eeprom_write_enable (dev_addr,1); |
| 199 | #endif |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 200 | /* Write data until done or would cross a write page boundary. |
| 201 | * We must write the address again when changing pages |
| 202 | * because the address counter only increments within a page. |
| 203 | */ |
| 204 | |
| 205 | while (offset < end) { |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 206 | unsigned alen, len; |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 207 | #if !defined(CONFIG_SYS_I2C_FRAM) |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 208 | unsigned maxlen; |
| 209 | #endif |
| 210 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 211 | #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 212 | uchar addr[2]; |
| 213 | |
| 214 | blk_off = offset & 0xFF; /* block offset */ |
| 215 | |
| 216 | addr[0] = offset >> 8; /* block number */ |
| 217 | addr[1] = blk_off; /* block offset */ |
| 218 | alen = 2; |
| 219 | #else |
| 220 | uchar addr[3]; |
| 221 | |
| 222 | blk_off = offset & 0xFF; /* block offset */ |
| 223 | |
| 224 | addr[0] = offset >> 16; /* block number */ |
| 225 | addr[1] = offset >> 8; /* upper address octet */ |
| 226 | addr[2] = blk_off; /* lower address octet */ |
| 227 | alen = 3; |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 228 | #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */ |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 229 | |
| 230 | addr[0] |= dev_addr; /* insert device address */ |
| 231 | |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 232 | len = end - offset; |
| 233 | |
| 234 | /* |
| 235 | * For a FRAM device there is no limit on the number of the |
Michael Jones | f9a78b8 | 2011-07-14 22:09:28 +0000 | [diff] [blame] | 236 | * bytes that can be accessed with the single read or write |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 237 | * operation. |
| 238 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 239 | #if !defined(CONFIG_SYS_I2C_FRAM) |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 240 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 241 | #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 242 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 243 | #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 244 | #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1)) |
| 245 | |
| 246 | maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off); |
| 247 | #else |
| 248 | maxlen = 0x100 - blk_off; |
| 249 | #endif |
| 250 | if (maxlen > I2C_RXTX_LEN) |
| 251 | maxlen = I2C_RXTX_LEN; |
| 252 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 253 | if (len > maxlen) |
| 254 | len = maxlen; |
| d4f5c72 | 2005-08-12 21:16:13 +0200 | [diff] [blame] | 255 | #endif |
| 256 | |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 257 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 258 | spi_write (addr, alen, buffer, len); |
| 259 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 260 | #if defined(CONFIG_SYS_EEPROM_X40430) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 261 | /* Get the value of the control register. |
| 262 | * Set current address (internal pointer in the x40430) |
| 263 | * to 0x1ff. |
| 264 | */ |
| 265 | contr_r_addr[0] = 9; |
| 266 | contr_r_addr[1] = 0xff; |
| 267 | addr_void[0] = 0; |
| 268 | addr_void[1] = addr[1]; |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 269 | #ifdef CONFIG_SYS_I2C_EEPROM_ADDR |
| 270 | contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR; |
| 271 | addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR; |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 272 | #endif |
| 273 | contr_reg[0] = 0xff; |
| 274 | if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) { |
| 275 | rcode = 1; |
| 276 | } |
| 277 | ctrl_reg_v = contr_reg[0]; |
| 278 | |
| 279 | /* Are any of the eeprom blocks write protected? |
| 280 | */ |
| 281 | if (ctrl_reg_v & 0x18) { |
| 282 | ctrl_reg_v &= ~0x18; /* reset block protect bits */ |
| 283 | ctrl_reg_v |= 0x02; /* set write enable latch */ |
| 284 | ctrl_reg_v &= ~0x04; /* clear RWEL */ |
| 285 | |
| 286 | /* Set write enable latch. |
| 287 | */ |
| 288 | contr_reg[0] = 0x02; |
| 289 | if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) { |
| 290 | rcode = 1; |
| 291 | } |
| 292 | |
| 293 | /* Set register write enable latch. |
| 294 | */ |
| 295 | contr_reg[0] = 0x06; |
| 296 | if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) { |
| 297 | rcode = 1; |
| 298 | } |
| 299 | |
| 300 | /* Modify ctrl register. |
| 301 | */ |
| 302 | contr_reg[0] = ctrl_reg_v; |
| 303 | if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) { |
| 304 | rcode = 1; |
| 305 | } |
| 306 | |
| 307 | /* The write (above) is an operation on NV memory. |
| 308 | * These can take some time (~5ms), and the device |
| 309 | * will not respond to further I2C messages till |
| 310 | * it's completed the write. |
| 311 | * So poll device for an I2C acknowledge. |
| 312 | * When we get one we know we can continue with other |
| 313 | * operations. |
| 314 | */ |
| 315 | contr_reg[0] = 0; |
| 316 | for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) { |
wdenk | aacf9a4 | 2003-01-17 16:27:01 +0000 | [diff] [blame] | 317 | if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 318 | break; /* got ack */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 319 | #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS) |
| 320 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 321 | #endif |
| 322 | } |
| 323 | if (i == MAX_ACKNOWLEDGE_POLLS) { |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 324 | puts ("EEPROM poll acknowledge failed\n"); |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 325 | rcode = 1; |
| 326 | } |
| 327 | } |
| 328 | |
| 329 | /* Is the write enable latch on?. |
| 330 | */ |
| 331 | else if (!(ctrl_reg_v & 0x02)) { |
| 332 | /* Set write enable latch. |
| 333 | */ |
| 334 | contr_reg[0] = 0x02; |
| 335 | if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) { |
| 336 | rcode = 1; |
| 337 | } |
| 338 | } |
| 339 | /* Write is enabled ... now write eeprom value. |
| 340 | */ |
| 341 | #endif |
| 342 | if (i2c_write (addr[0], offset, alen-1, buffer, len) != 0) |
| 343 | rcode = 1; |
| 344 | |
| 345 | #endif |
| 346 | buffer += len; |
| 347 | offset += len; |
| 348 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 349 | #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS) |
| 350 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 351 | #endif |
| 352 | } |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 353 | #if defined(CONFIG_SYS_EEPROM_WREN) |
Stefan Roese | 98f4a3d | 2005-09-22 09:04:17 +0200 | [diff] [blame] | 354 | eeprom_write_enable (dev_addr,0); |
| 355 | #endif |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 356 | return rcode; |
| 357 | } |
| 358 | |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 359 | #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
wdenk | 6dd652f | 2003-06-19 23:40:20 +0000 | [diff] [blame] | 360 | int |
| 361 | eeprom_probe (unsigned dev_addr, unsigned offset) |
| 362 | { |
| 363 | unsigned char chip; |
| 364 | |
| 365 | /* Probe the chip address |
| 366 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 367 | #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X) |
wdenk | 6dd652f | 2003-06-19 23:40:20 +0000 | [diff] [blame] | 368 | chip = offset >> 8; /* block number */ |
| 369 | #else |
| 370 | chip = offset >> 16; /* block number */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 371 | #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */ |
wdenk | 6dd652f | 2003-06-19 23:40:20 +0000 | [diff] [blame] | 372 | |
| 373 | chip |= dev_addr; /* insert device address */ |
| 374 | |
| 375 | return (i2c_probe (chip)); |
| 376 | } |
| 377 | #endif |
| 378 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 379 | /*----------------------------------------------------------------------- |
| 380 | * Set default values |
| 381 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 382 | #ifndef CONFIG_SYS_I2C_SPEED |
| 383 | #define CONFIG_SYS_I2C_SPEED 50000 |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 384 | #endif |
| 385 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 386 | void eeprom_init (void) |
| 387 | { |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 388 | |
| 389 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 390 | spi_init_f (); |
| 391 | #endif |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 392 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 393 | i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 394 | #endif |
| 395 | } |
Heiko Schocher | 548738b | 2010-01-07 08:55:40 +0100 | [diff] [blame] | 396 | |
wdenk | 3863585 | 2002-08-27 05:55:31 +0000 | [diff] [blame] | 397 | /*----------------------------------------------------------------------- |
| 398 | */ |
Jon Loeliger | 9025317 | 2007-07-10 11:02:44 -0500 | [diff] [blame] | 399 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 400 | /***************************************************/ |
| 401 | |
Jon Loeliger | baa26db | 2007-07-08 17:51:39 -0500 | [diff] [blame] | 402 | #if defined(CONFIG_CMD_EEPROM) |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 403 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 404 | #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS |
wdenk | 0d49839 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 405 | U_BOOT_CMD( |
| 406 | eeprom, 6, 1, do_eeprom, |
Peter Tyser | 2fb2604 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 407 | "EEPROM sub-system", |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 408 | "read devaddr addr off cnt\n" |
| 409 | "eeprom write devaddr addr off cnt\n" |
Wolfgang Denk | a89c33d | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 410 | " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'" |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 411 | ); |
| 412 | #else /* One EEPROM */ |
wdenk | 0d49839 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 413 | U_BOOT_CMD( |
| 414 | eeprom, 5, 1, do_eeprom, |
Peter Tyser | 2fb2604 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 415 | "EEPROM sub-system", |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 416 | "read addr off cnt\n" |
| 417 | "eeprom write addr off cnt\n" |
Wolfgang Denk | a89c33d | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 418 | " - read/write `cnt' bytes at EEPROM offset `off'" |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 419 | ); |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 420 | #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 421 | |
Jon Loeliger | 9025317 | 2007-07-10 11:02:44 -0500 | [diff] [blame] | 422 | #endif |