blob: b8eb13de455c3088f5ee6b22bf9b81ffa237e63d [file] [log] [blame]
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +09001/*
2 * Configuation settings for the Renesas SH7763RDP board
3 *
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __SH7763RDP_H
27#define __SH7763RDP_H
28
29#define CONFIG_SH 1
30#define CONFIG_SH4 1
31#define CONFIG_CPU_SH7763 1
32#define CONFIG_SH7763RDP 1
33#define __LITTLE_ENDIAN 1
34
35/*
36 * Command line configuration.
37 */
38#define CONFIG_CMD_SDRAM
39#define CONFIG_CMD_FLASH
40#define CONFIG_CMD_MEMORY
Nobuhiro Iwamatsuba932442008-08-08 16:30:23 +090041#define CONFIG_CMD_NET
42#define CONFIG_CMD_PING
Mike Frysingerbdab39d2009-01-28 19:08:14 -050043#define CONFIG_CMD_SAVEENV
Nobuhiro Iwamatsuba932442008-08-08 16:30:23 +090044#define CONFIG_CMD_NFS
45#define CONFIG_CMD_JFFS2
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090046
47#define CONFIG_BOOTDELAY -1
48#define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
49#define CONFIG_ENV_OVERWRITE 1
50
51#define CONFIG_VERSION_VARIABLE
52#undef CONFIG_SHOW_BOOT_PROGRESS
53
54/* SCIF */
Jean-Christophe PLAGNIOL-VILLARD6c58a032008-08-13 01:40:38 +020055#define CONFIG_SCIF_CONSOLE 1
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090056#define CONFIG_BAUDRATE 115200
57#define CONFIG_CONS_SCIF2 1
58
Nobuhiro Iwamatsu00cb2e32011-01-17 20:53:29 +090059#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_LONGHELP /* undef to save memory */
61#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
62#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
63#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
64#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
65#define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090066 passed to kernel */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090068 settings for this board */
69
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090070/* SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
72#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
73#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
74#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090075
76/* Flash(NOR) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define CONFIG_SYS_FLASH_BASE (0xA0000000)
78#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
79#define CONFIG_SYS_MAX_FLASH_BANKS (1)
80#define CONFIG_SYS_MAX_FLASH_SECT (520)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090081
82/* U-boot setting */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
84#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
85#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090086/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090089
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020091#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092#undef CONFIG_SYS_FLASH_QUIET_TEST
93#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090094/* Timeout for Flash erase operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020095#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090096/* Timeout for Flash write operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020097#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +090098/* Timeout for Flash set sector lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +0900100/* Timeout for Flash clear lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +0900102/* Use hardware flash sectors protection instead of U-Boot software protection */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200103#undef CONFIG_SYS_FLASH_PROTECTION
104#undef CONFIG_SYS_DIRECT_FLASH_TFTP
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200105#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200106#define CONFIG_ENV_SECT_SIZE (128 * 1024)
107#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200108#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
109/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
110#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200111#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200112#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +0900113
114/* Clock */
115#define CONFIG_SYS_CLK_FREQ 66666666
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +0200116#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
Jean-Christophe PLAGNIOL-VILLARD8dd29c82009-06-04 12:06:47 +0200117#define CONFIG_SYS_HZ 1000
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +0900118
Nobuhiro Iwamatsuba932442008-08-08 16:30:23 +0900119/* Ether */
120#define CONFIG_SH_ETHER 1
121#define CONFIG_SH_ETHER_USE_PORT (1)
122#define CONFIG_SH_ETHER_PHY_ADDR (0x01)
123
Nobuhiro Iwamatsu7faddae2008-06-09 13:39:57 +0900124#endif /* __SH7763RDP_H */