blob: e3d4c30739ee9febe5f0ea85edb52f2684fc1cb3 [file] [log] [blame]
Marty E. Plummer8e2e6012019-01-05 20:12:08 -06001CONFIG_ARM=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +00002# CONFIG_SPL_USE_ARCH_MEMCPY is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -06003CONFIG_ARCH_ROCKCHIP=y
4CONFIG_SYS_TEXT_BASE=0x00100000
Tom Rini554e5512020-08-10 15:31:07 -04005CONFIG_NR_DRAM_BANKS=1
Tom Rini556fd592020-04-28 16:15:47 -04006CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
Tom Rinic5a6e9f2020-07-06 13:54:25 -04007CONFIG_SPL_TEXT_BASE=0xff704000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -06008CONFIG_ROCKCHIP_RK3288=y
9# CONFIG_SPL_MMC_SUPPORT is not set
10CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
Tom Rinid168bcb2019-04-29 15:54:04 -040011CONFIG_SPL_STACK_R_ADDR=0x80000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060012CONFIG_DEBUG_UART_BASE=0xff690000
13CONFIG_DEBUG_UART_CLOCK=24000000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060014CONFIG_SPL_SPI_FLASH_SUPPORT=y
15CONFIG_SPL_SPI_SUPPORT=y
Tom Rini556fd592020-04-28 16:15:47 -040016CONFIG_SPL_PAYLOAD="u-boot.img"
Tom Rini6e7d7aa2020-07-06 15:46:38 -040017CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
Tom Rinif7d0ae92020-07-28 08:46:52 -040018CONFIG_DEBUG_UART=y
Simon Glass37304aa2019-07-20 20:51:14 -060019CONFIG_USE_PREBOOT=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060020CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
Tom Rini0817daa2020-10-09 12:22:06 -040021CONFIG_SILENT_CONSOLE=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060022# CONFIG_DISPLAY_CPUINFO is not set
23CONFIG_DISPLAY_BOARDINFO_LATE=y
Urja Rannikkofffdf722020-05-13 19:15:21 +000024CONFIG_BOARD_EARLY_INIT_R=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000025# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060026CONFIG_SPL_STACK_R=y
27CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Urja Rannikko7ba79f22019-05-13 13:51:05 +000028# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
29# CONFIG_SPL_CRC32_SUPPORT is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060030CONFIG_SPL_SPI_LOAD=y
31CONFIG_CMD_GPIO=y
32CONFIG_CMD_GPT=y
33CONFIG_CMD_I2C=y
34CONFIG_CMD_MMC=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060035CONFIG_CMD_SF_TEST=y
36CONFIG_CMD_SPI=y
37CONFIG_CMD_USB=y
38# CONFIG_CMD_SETEXPR is not set
39CONFIG_CMD_CACHE=y
40CONFIG_CMD_TIME=y
41CONFIG_CMD_PMIC=y
42CONFIG_CMD_REGULATOR=y
43# CONFIG_SPL_DOS_PARTITION is not set
44# CONFIG_SPL_EFI_PARTITION is not set
45CONFIG_SPL_PARTITION_UUIDS=y
46CONFIG_SPL_OF_CONTROL=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060047CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
48CONFIG_SPL_OF_PLATDATA=y
Tom Rini8d8ee472019-11-12 22:46:36 -050049CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060050CONFIG_REGMAP=y
51CONFIG_SPL_REGMAP=y
52CONFIG_SYSCON=y
53CONFIG_SPL_SYSCON=y
54# CONFIG_SPL_SIMPLE_BUS is not set
Urja Rannikko7ba79f22019-05-13 13:51:05 +000055# CONFIG_SPL_BLK is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060056CONFIG_CLK=y
57CONFIG_SPL_CLK=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060058CONFIG_ROCKCHIP_GPIO=y
59CONFIG_I2C_CROS_EC_TUNNEL=y
60CONFIG_SYS_I2C_ROCKCHIP=y
61CONFIG_I2C_MUX=y
62CONFIG_DM_KEYBOARD=y
63CONFIG_CROS_EC_KEYB=y
64CONFIG_CROS_EC=y
65CONFIG_CROS_EC_SPI=y
66CONFIG_PWRSEQ=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000067# CONFIG_SPL_DM_MMC is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060068CONFIG_MMC_DW=y
69CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal888f1842019-10-03 19:50:05 +020070CONFIG_MTD=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000071CONFIG_SF_DEFAULT_BUS=2
Patrick Delaunay14453fb2019-02-27 15:20:36 +010072CONFIG_SF_DEFAULT_SPEED=20000000
Urja Rannikko64df5122019-05-13 13:51:03 +000073CONFIG_SPI_FLASH_GIGADEVICE=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060074CONFIG_PINCTRL=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000075CONFIG_PINCONF=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060076CONFIG_SPL_PINCTRL=y
Urja Rannikko5e50f872020-05-13 19:15:23 +000077# CONFIG_SPL_PINCTRL_FULL is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060078CONFIG_DM_PMIC=y
79# CONFIG_SPL_PMIC_CHILDREN is not set
80CONFIG_PMIC_RK8XX=y
81CONFIG_DM_REGULATOR_FIXED=y
82CONFIG_REGULATOR_RK8XX=y
83CONFIG_PWM_ROCKCHIP=y
84CONFIG_RAM=y
85CONFIG_SPL_RAM=y
86CONFIG_DEBUG_UART_SHIFT=2
87CONFIG_ROCKCHIP_SERIAL=y
88CONFIG_ROCKCHIP_SPI=y
89CONFIG_SYSRESET=y
90CONFIG_USB=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000091# CONFIG_SPL_DM_USB is not set
92CONFIG_USB_DWC2=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060093CONFIG_ROCKCHIP_USB2_PHY=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060094CONFIG_DM_VIDEO=y
Anatolij Gustschin8a6ffed2020-02-04 22:43:06 +010095# CONFIG_VIDEO_BPP8 is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060096CONFIG_CONSOLE_TRUETYPE=y
97CONFIG_DISPLAY=y
98CONFIG_VIDEO_ROCKCHIP=y
99CONFIG_DISPLAY_ROCKCHIP_EDP=y
100CONFIG_DISPLAY_ROCKCHIP_HDMI=y
101# CONFIG_USE_PRIVATE_LIBGCC is not set
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000102CONFIG_SPL_TINY_MEMSET=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -0600103CONFIG_CMD_DHRYSTONE=y
104CONFIG_ERRNO_STR=y