blob: a6f8b56a3ab106097e960909529842f87c608701 [file] [log] [blame]
wdenk281e00a2004-08-01 22:48:16 +00001/*
Jean-Christophe PLAGNIOL-VILLARD10a451c2009-05-08 20:24:12 +02002 * (c) Copyright 2004
3 * Techware Information Technology, Inc.
4 * Ming-Len Wu <minglen_wu@techware.com.tw>
5 *
wdenk281e00a2004-08-01 22:48:16 +00006 * (C) Copyright 2000-2004
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
Jean-Christophe PLAGNIOL-VILLARD10a451c2009-05-08 20:24:12 +02009 * (C) Copyright 2002
10 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
11 *
wdenk281e00a2004-08-01 22:48:16 +000012 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 *
30 */
31
32OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
33OUTPUT_ARCH(arm)
34ENTRY(_start)
35SECTIONS
36{
37 . = 0x00000000;
38
39 . = ALIGN(4);
Jean-Christophe PLAGNIOL-VILLARD10a451c2009-05-08 20:24:12 +020040 .text :
wdenk281e00a2004-08-01 22:48:16 +000041 {
Peter Tyser84ad6882010-04-12 22:28:11 -050042 arch/arm/cpu/arm920t/start.o (.text)
wdenk281e00a2004-08-01 22:48:16 +000043 *(.text)
44 }
45
46 . = ALIGN(4);
Trent Piephof62fb992009-02-18 15:22:05 -080047 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
wdenk281e00a2004-08-01 22:48:16 +000048
49 . = ALIGN(4);
Heiko Schochercc7cdcb2010-09-17 13:10:43 +020050 .data : {
51 *(.data)
Heiko Schochercc7cdcb2010-09-17 13:10:43 +020052 }
wdenk281e00a2004-08-01 22:48:16 +000053
54 . = ALIGN(4);
wdenk281e00a2004-08-01 22:48:16 +000055
Wolfgang Denk807d5d72005-08-31 12:28:00 +020056 . = .;
wdenk281e00a2004-08-01 22:48:16 +000057 __u_boot_cmd_start = .;
58 .u_boot_cmd : { *(.u_boot_cmd) }
59 __u_boot_cmd_end = .;
60
61 . = ALIGN(4);
Albert Aribaud3336ca62010-11-25 22:45:02 +010062
63 .rel.dyn : {
64 __rel_dyn_start = .;
65 *(.rel*)
66 __rel_dyn_end = .;
67 }
68
69 .dynsym : {
70 __dynsym_start = .;
71 *(.dynsym)
72 }
73
74 .bss __rel_dyn_start (OVERLAY) : {
75 __bss_start = .;
76 *(.bss)
77 . = ALIGN(4);
78 _end = .;
79 }
80
81 /DISCARD/ : { *(.dynstr*) }
82 /DISCARD/ : { *(.dynamic*) }
83 /DISCARD/ : { *(.plt*) }
84 /DISCARD/ : { *(.interp*) }
85 /DISCARD/ : { *(.gnu*) }
wdenk281e00a2004-08-01 22:48:16 +000086}