blob: 0da3a40e3de7afec0eeed84905789b8bfeeafa57 [file] [log] [blame]
Jagan Teki337fcdc2018-12-31 15:35:01 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#include <common.h>
8#include <clk-uclass.h>
9#include <dm.h>
10#include <errno.h>
11#include <asm/arch/ccu.h>
12#include <dt-bindings/clock/sun50i-h6-ccu.h>
13#include <dt-bindings/reset/sun50i-h6-ccu.h>
14
15static struct ccu_clk_gate h6_gates[] = {
16 [CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
17 [CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
18 [CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
19 [CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
20};
21
22static struct ccu_reset h6_resets[] = {
23 [RST_BUS_UART0] = RESET(0x90c, BIT(16)),
24 [RST_BUS_UART1] = RESET(0x90c, BIT(17)),
25 [RST_BUS_UART2] = RESET(0x90c, BIT(18)),
26 [RST_BUS_UART3] = RESET(0x90c, BIT(19)),
27};
28
29static const struct ccu_desc h6_ccu_desc = {
30 .gates = h6_gates,
31 .resets = h6_resets,
32};
33
34static int h6_clk_bind(struct udevice *dev)
35{
36 return sunxi_reset_bind(dev, ARRAY_SIZE(h6_resets));
37}
38
39static const struct udevice_id h6_ccu_ids[] = {
40 { .compatible = "allwinner,sun50i-h6-ccu",
41 .data = (ulong)&h6_ccu_desc },
42 { }
43};
44
45U_BOOT_DRIVER(clk_sun50i_h6) = {
46 .name = "sun50i_h6_ccu",
47 .id = UCLASS_CLK,
48 .of_match = h6_ccu_ids,
49 .priv_auto_alloc_size = sizeof(struct ccu_priv),
50 .ops = &sunxi_clk_ops,
51 .probe = sunxi_clk_probe,
52 .bind = h6_clk_bind,
53};